US5923957A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process for manufacturing a lead-on-chip semiconductor device package having a discontinuous adhesive layer formed from liquid adhesive
Assignee: Samsung Electronics Co Ltd
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Filing: 1997-05-09
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Granted: 1999-07-13
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Expires: 2017-05-09
Abstract
Abstract A lead-on-chip semiconductor device package is formed by attaching a lead frame to the chip with a discontinuous adhesive layer. Electrode pads of the chip are electrically connected by bonding wires and mechanically connected by the adhesive layer to the lead frame, and then encapsulated by an encapsulant such as molding compound. The adhesive layer is formed from a liquid adhesive material having a certain viscosity. Although the liquid adhesive is continuously applied to top surfaces of the inner leads as well as gaps between adjacent inner leads, the adhesive layer is formed only on the top surfaces of the inner leads while the liquid adhesive falls through the gaps. Thermoplastic or thermosetting resins may be used as the liquid adhesive.
Inventors
- 👤 Young Jae Song
- 👤 Jeong Woo Seo
- 👤 Seung Ho Ann
- 👤 Chan Seung Hwang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 14:46
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/01; H10W72/013; H10W76/00; H10W76/40; H10W76/42; H10W70/00; H10W70/40; H10W70/411; H10W70/415; H10W72/011; H10W72/0113; H10W72/071; H10W72/073; H10W72/50; H10W72/59; H10W72/851; H10W72/853; H10W72/865; H10W72/874; H10W72/884; H10W72/90; H10W72/941; H10W72/944; H10W72/9445; H10W72/951; H10W74/00; H10W90/00; H10W90/701; H10W90/731; H10W90/736; H10W90/751; H10W90/756
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
220 words
A method for manufacturing a lead-on-chip semiconductor device package, comprising steps of: preparing a semiconductor chip and a lead frame, said semiconductor chip having an active surface on which a plurality of electrode pads are formed, and said lead frame having a plurality of inner leads and a plurality of outer leads; continuously applying a liquid adhesive having a certain viscosity along a top surface of said plurality of inner leads of said lead frame; forming an adhesive layer on the top surfaces of the inner leads, while allowing said liquid adhesive to drip down through gaps formed between adjacent of said inner leads; attaching said plurality of inner leads of said lead frame to said active surface of said semiconductor chip by means of said adhesive layer, whereby said adhesive layer is positioned between said semiconductor chip and said lead frame, and said plurality of electrode pads of said semiconductor chip are exposed through a space defined between opposing rows of said plurality of inner leads; electrically interconnecting respective of said plurality of electrode pads of said semiconductor chip to respective of said plurality of inner leads of said lead frame using a bonding wire; and encapsulating said semiconductor chip, said adhesive layer, said plurality of inner leads of said lead frame, and said bonding wire, with an encapsulant.
Claim 2
Independent Claim
220 words
A method for manufacturing a lead-on-chip semiconductor device package, comprising steps of: preparing a semiconductor chip and a lead frame, said semiconductor chip having an active surface on which a plurality of electrode pads are formed, and said lead frame having a plurality of inner leads and a plurality of outer leads; continuously applying a liquid adhesive having a certain viscosity along a top surface of said plurality of inner leads of said lead frame; forming an adhesive layer on the top surfaces of the inner leads, while allowing said liquid adhesive to drip down through gaps formed between adjacent of said inner leads; attaching said plurality of inner leads of said lead frame to said active surface of said semiconductor chip by means of said adhesive layer, whereby said adhesive layer is positioned between said semiconductor chip and said lead frame, and said plurality of electrode pads of said semiconductor chip are exposed through a space defined between opposing rows of said plurality of inner leads; electrically interconnecting respective of said plurality of electrode pads of said semiconductor chip to respective of said plurality of inner leads of said lead frame using a bonding wire; and encapsulating said semiconductor chip, said adhesive layer, said plurality of inner leads of said lead frame, and said bonding wire, with an encapsulant.
Claim 3
Dependent Claim
26 words
The method of claim 1, wherein said forming step includes a step of curing said liquid adhesive remaining on the top surfaces of said inner leads.
Claim 4
Dependent Claim
13 words
The method of claim 1, wherein said liquid adhesive is a thermoplastic resin.
Claim 5
Dependent Claim
22 words
The method of claim 3, wherein the thermoplastic resin is selected from the group consisting of polyether amid, polyimide siloxane, and polyimide.
Claim 6
Dependent Claim
19 words
The method of claim 3, wherein said curing step is carried out at a temperature of about 200° C.
Claim 7
Dependent Claim
24 words
The method of claim 3, wherein said attaching step includes a step of thermocompressing said adhesive layer at a temperature of about 400° C.
Claim 8
Dependent Claim
13 words
The method of claim 2, wherein said liquid adhesive is a thermosetting resin.
Claim 9
Dependent Claim
19 words
The method of claim 7, wherein said curing step is carried out at a temperature of about 150° C.
Claim 10
Dependent Claim
24 words
The method of claim 7, wherein said attaching step includes a step of thermocompressing said adhesive layer at a temperature of about 200° C.
Claim 11
Independent Claim
251 words
A method for manufacturing a lead-on-chip semiconductor device package, comprising steps of: preparing a semiconductor chip and a lead frame, said semiconductor chip having an active surface on which a plurality of electrode pads are formed, said lead frame having a plurality of inner leads, a plurality of outer leads, and a joint bar for joining respective tips of said plurality of inner leads, said joint bar being formed perpendicular to said inner leads; continuously applying a liquid adhesive having a certain viscosity along a top surface of said joint bar of said lead frame; forming an adhesive layer on said joint bar; removing portions of said joint bar corresponding to gaps defined between adjacent of said plurality inner leads, whereby said adhesive layer is arranged only on the top surface of the inner leads; attaching said plurality of inner leads of said lead frame to said active surface of said semiconductor chip by means of said adhesive layer, whereby said adhesive layer is positioned between said semiconductor chip and said lead frame, and said plurality of electrode pads of said semiconductor chip are exposed through a space defined between opposing rows of said plurality of inner leads; electrically interconnecting respective of said plurality of electrode pads of said semiconductor chip to respective of said plurality of inner leads of said lead frame using a bonding wire; and encapsulating said semiconductor chip, said adhesive layer, said plurality of inner leads of said lead frame, and said bonding wire, with an encapsulant.
Claim 12
Independent Claim
251 words
A method for manufacturing a lead-on-chip semiconductor device package, comprising steps of: preparing a semiconductor chip and a lead frame, said semiconductor chip having an active surface on which a plurality of electrode pads are formed, said lead frame having a plurality of inner leads, a plurality of outer leads, and a joint bar for joining respective tips of said plurality of inner leads, said joint bar being formed perpendicular to said inner leads; continuously applying a liquid adhesive having a certain viscosity along a top surface of said joint bar of said lead frame; forming an adhesive layer on said joint bar; removing portions of said joint bar corresponding to gaps defined between adjacent of said plurality inner leads, whereby said adhesive layer is arranged only on the top surface of the inner leads; attaching said plurality of inner leads of said lead frame to said active surface of said semiconductor chip by means of said adhesive layer, whereby said adhesive layer is positioned between said semiconductor chip and said lead frame, and said plurality of electrode pads of said semiconductor chip are exposed through a space defined between opposing rows of said plurality of inner leads; electrically interconnecting respective of said plurality of electrode pads of said semiconductor chip to respective of said plurality of inner leads of said lead frame using a bonding wire; and encapsulating said semiconductor chip, said adhesive layer, said plurality of inner leads of said lead frame, and said bonding wire, with an encapsulant.
References Cited (Backward Citations)
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