High density plasma enhanced chemical vapor deposition process in combination with chemical mechanical polishing process for preparation and planarization of intemetal dielectric layers

Claim 1

A wafer planarization process for planarizing a semiconductor wafer surface by combining a high density plasma chemical vapor deposition (HDP-CVD) process with a chemical mechanical polishing (CMP) process, said process comprising the steps of: (a) selecting an HDP-CVD composition containing a predetermined etching component and a predetermined deposition component such that a higher etching/deposition component ratio will generally result in a slower removal rate by a subsequent CMP process of an HDP-CVD layer after said HDP-CVD layer is deposited on a substrate, and a lower etching/deposition component ratio will generally result in a faster removal rate; (b) forming a first HDP-CVD layer on the substrate via an HDP-CVD process using a first HDP-CVD composition, which contains said etching component and said deposition component having a high etching/depositing component ratio and thus a low CMP removal rate; (c) forming a second HDP-CVD layer on the first HDP-CVD layer using the same HDP-CVD process but with a second HDP-CVD composition, wherein said second HDP-CVD composition contains the same etching and deposition components but with a lower etching/depositing component ratio and thus a higher CMP removal rate relative to said first HDP-CVD composition; and (d) using a chemical mechanical process to remove at least a part of said second HDP-CVD layer using said first HDP-CVD layer as a stopper.