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US5920646A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital copying apparatus capable of forming a superior quality image with a reduced amount of memory

Assignee: Ricoh Co Ltd
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Filing: 1997-03-04
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Granted: 1999-07-06
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Expires: 2017-03-04
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Abstract

Abstract A digital copying apparatus provides high quality copy images suitable for an original document image while reducing a necessary capacity of a memory for storing image data. An image signal read by an image reading unit is binarized by a binary gradation processing unit in a gradation processing unit and is stored in a memory unit. Then, binary image data read from the memory unit is applied to a multi-value processing unit, wherein a pattern recognition unit determines whether or not the binary image data includes a pixel which requires a jagged line correction, and a halftone detector detects a halftone region in the binary image data. A determination unit and a selector select jagged line correction data output from a pattern memory and multi-valued image data converted from the binary image data by a multi-value filter. The selected data is output to an image forming unit.

Inventors

  • 👤 Kouichi Kamon

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 13:20
CPC Classifications
H; H04; H04N; H04N1/00; H04N1/40; H04N1/40062; H04N1/409; H04N1/4092

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 223 words
An image forming apparatus comprising: image input means for inputting a document image to generate an electrical image signal representing the document image; signal processing means for signal processing said electrical image signal generated by said image input means; and image output means for outputting an image in accordance with the image signal processed by said signal processing means; wherein said signal processing means comprises: binarizing means for binarizing said electrical image signal generated by said image input means; memory means for storing binarized image data generated by said binarizing means; pattern recognition means for performing pattern recognition to determine whether or not said electrical image signal includes a pixel which requires a jagged line correction based on said binarized image data read from said memory; jagged line correction executing means for executing the jagged line correction to a pixel determined to require the jagged line correction; halftone detecting means for detecting a halftone region from said binarized image data; multi-value processing means including a multi-value filter for converting said binarized image data into multi-valued image data; and output selecting means for selectively outputting output image data of said jagged line correction means and output image data of said multi-value processing means based on a determination result provided by said pattern recognition means and a detection result provided by said halftone detecting means.
Claim 2
Dependent Claim 223 words
An image forming apparatus comprising: image input means for inputting a document image to generate an electrical image signal representing the document image; signal processing means for signal processing said electrical image signal generated by said image input means; and image output means for outputting an image in accordance with the image signal processed by said signal processing means; wherein said signal processing means comprises: binarizing means for binarizing said electrical image signal generated by said image input means; memory means for storing binarized image data generated by said binarizing means; pattern recognition means for performing pattern recognition to determine whether or not said electrical image signal includes a pixel which requires a jagged line correction based on said binarized image data read from said memory; jagged line correction executing means for executing the jagged line correction to a pixel determined to require the jagged line correction; halftone detecting means for detecting a halftone region from said binarized image data; multi-value processing means including a multi-value filter for converting said binarized image data into multi-valued image data; and output selecting means for selectively outputting output image data of said jagged line correction means and output image data of said multi-value processing means based on a determination result provided by said pattern recognition means and a detection result provided by said halftone detecting means.
Claim 3
Dependent Claim 59 words
The image forming apparatus according to claim 1, wherein said output selecting means includes: a plurality of determination means for selecting output image data based on a determination result provided by said pattern recognition means and a detection result provided by said halftone detecting means; and mode setting means for selectively setting one of said plurality of determination means.
Claim 4
Dependent Claim 196 words
The image forming apparatus according to claim 1, wherein said halftone detecting means includes: means for arranging binarized image data read from said memory means in a two-dimensional matrix having a size of M×N, where M and N are odd integers; means for dividing said M×N matrix region into a predetermined number of sub-regions, each of said predetermined number of sub-regions including a pixel of interest located at a center of said M×N matrix region, and for counting a number of black pixels in each of said predetermined number of sub-regions; first determination means for determining whether or not said pixel of interest falls under a halftone portion based on a difference between maximum and minimum values of the number of black pixels in said predetermined number of sub-regions; second determination means for determining whether or not said pixel of interest falls under a halftone portion based on a difference in a number of black pixels between two pairs of diagonally opposing ones of said predetermined number of sub-regions; and means for finally determining whether or not said pixel of interest falls under a halftone portion from determination results of said first and second determination means.
Claim 5
Dependent Claim 16 words
The image forming apparatus according to claim 3, wherein the predetermined number of sub-regions is four.
Claim 6
Dependent Claim 196 words
The image forming apparatus according to claim 2, wherein said halftone detecting means includes: means for arranging binarized image data read from said memory means in a two-dimensional matrix having a size of M×N, where M and N are odd integers; means for dividing said M×N matrix region into a predetermined number of sub-regions, each of said predetermined number of sub-regions including a pixel of interest located at a center of said M×N matrix region, and for counting a number of black pixels in each of said predetermined number of sub-regions; first determination means for determining whether or not said pixel of interest falls under a halftone portion based on a difference between maximum and minimum values of the number of black pixels in said predetermined number of sub-regions; second determination means for determining whether or not said pixel of interest falls under a halftone portion based on a difference in a number of black pixels between two pairs of diagonally opposing ones of said predetermined number of sub-regions; and means for finally determining whether or not said pixel of interest falls under a halftone portion from determination results of said first and second determination means.
Claim 7
Dependent Claim 16 words
The image forming apparatus according to claim 5, wherein the predetermined number of sub-regions is four.
Claim 8
Dependent Claim 78 words
The image forming apparatus according to claim 3, wherein: said multi-value processing means comprises means for converting said binarized image data into multi-valued image data using a two-dimension multi-value filter having a size smaller than said two-dimensional matrix having the size of M×N, for arranging binarized image data therein; and said output selecting means selects and outputs multi-valued image data converted by said multi-value processing means for a pixel which is detected to belong to a halftone portion.
Claim 9
Dependent Claim 78 words
The image forming apparatus according to claim 5, wherein: said multi-value processing means comprises means for converting said binarized image data into multi-valued image data using a two-dimension multi-value filter having a size smaller than said two-dimensional matrix having the size of M×N, for arranging binarized image data therein; and said output selecting means selects and outputs multi-valued image data converted by said multi-value processing means for a pixel which is detected to belong to a halftone portion.
Claim 10
Dependent Claim 225 words
An image forming apparatus, comprising: an input device for inputting a document image to generate an electrical image signal representing the document image; a signal processor for signal processing said electrical image signal generated by said input device; and an output device for outputting an image in accordance with the image signal processed by said signal processor; wherein said signal processor comprises: a binarizing circuit for binarizing said electrical image signal generated by said input device; a memory for storing binarized image data generated by said binarizing circuit; a pattern recognition circuit for performing pattern recognition to determine whether or not said electrical image signal includes a pixel which requires a jagged line correction based on said binarized image data read from said memory; a jagged line correction executing circuit for executing the jagged line correction to a pixel determined to require the jagged line correction; a halftone detecting circuit for detecting a halftone region from said binarized image data; a multi-value processing circuit including a multi-value filter for converting said binarized image data into multi-valued image data; and an output selecting circuit for selectively outputting output image data of said jagged line correction circuit and output image data of said multi-value processing circuit based on a determination result provided by said pattern recognition circuit and a detection result provided by said halftone detecting circuit.
Claim 11
Dependent Claim 225 words
An image forming apparatus, comprising: an input device for inputting a document image to generate an electrical image signal representing the document image; a signal processor for signal processing said electrical image signal generated by said input device; and an output device for outputting an image in accordance with the image signal processed by said signal processor; wherein said signal processor comprises: a binarizing circuit for binarizing said electrical image signal generated by said input device; a memory for storing binarized image data generated by said binarizing circuit; a pattern recognition circuit for performing pattern recognition to determine whether or not said electrical image signal includes a pixel which requires a jagged line correction based on said binarized image data read from said memory; a jagged line correction executing circuit for executing the jagged line correction to a pixel determined to require the jagged line correction; a halftone detecting circuit for detecting a halftone region from said binarized image data; a multi-value processing circuit including a multi-value filter for converting said binarized image data into multi-valued image data; and an output selecting circuit for selectively outputting output image data of said jagged line correction circuit and output image data of said multi-value processing circuit based on a determination result provided by said pattern recognition circuit and a detection result provided by said halftone detecting circuit.
Claim 12
Dependent Claim 60 words
The image forming apparatus according to claim 9, wherein said output selecting circuit includes: a plurality of determination circuits for selecting output image data based on a determination result provided by said pattern recognition circuit and a detection result provided by said halftone detecting circuit; and a mode setting circuit for selectively setting one of said plurality of determination circuits.
Claim 13
Dependent Claim 200 words
The image forming apparatus according to claim 9, wherein said halftone detecting circuit includes: a circuit for arranging binarized image data read from said memory in a two-dimensional matrix having a size of M×N, where M and N are odd integers; a circuit for dividing said M×N matrix region into a predetermined number of sub-regions, each of said predetermined number of sub-regions including a pixel of interest located at a center of said M×N matrix region, and for counting a number of black pixels in each of said predetermined number of sub-regions; a first determination circuit for determining whether or not said pixel of interest falls under a halftone portion based on a difference between maximum and minimum values of the number of black pixels in said predetermined number of sub-regions; a second determination circuit for determining whether or not said pixel of interest falls under a halftone portion based on a difference in a number of black pixels between two pairs of diagonally opposing ones of said predetermined number of sub-regions; and a circuit for finally determining whether or not said pixel of interest falls under a halftone portion from determination results of said first and second determination circuits.
Claim 14
Dependent Claim 16 words
The image forming apparatus according to claim 11, wherein the predetermined number of sub-regions is four.
Claim 15
Dependent Claim 200 words
The image forming apparatus according to claim 10, wherein said halftone detecting circuit includes: a circuit for arranging binarized image data read from said memory in a two-dimensional matrix having a size of M×N, where M and N are odd integers; a circuit for dividing said M×N matrix region into a predetermined number of sub-regions, each of said predetermined number of sub-regions including a pixel of interest located at a center of said M×N matrix region, and for counting a number of black pixels in each of said predetermined number of sub-regions; a first determination circuit for determining whether or not said pixel of interest falls under a halftone portion based on a difference between maximum and minimum values of the number of black pixels in said predetermined number of sub-regions; a second determination circuit for determining whether or not said pixel of interest falls under a halftone portion based on a difference in a number of black pixels between two pairs of diagonally opposing ones of said predetermined number of sub-regions; and a circuit for finally determining whether or not said pixel of interest falls under a halftone portion from determination results of said first and second determination circuits.
Claim 16
Dependent Claim 16 words
The image forming apparatus according to claim 13, wherein the predetermined number of sub-regions is four.
Claim 17
Dependent Claim 79 words
The image forming apparatus according to claim 11, wherein: said multi-value processing circuit comprises a circuit for converting said binarized image data into multi-valued image data using a two-dimension multi-value filter having a size smaller than said two-dimensional matrix having the size of M×N for arranging binarized image data therein; and said output selecting circuit selects and outputs multi-valued image data converted by said multi-value processing circuit for a pixel which is detected to belong to a halftone portion.
Claim 18
Dependent Claim 79 words
The image forming apparatus according to claim 13, wherein: said multi-value processing circuit comprises a circuit for converting said binarized image data into multi-valued image data using a two-dimension multi-value filter having a size smaller than said two-dimensional matrix having the size of M×N for arranging binarized image data therein; and said output selecting circuit selects and outputs multi-valued image data converted by said multi-value processing circuit for a pixel which is detected to belong to a halftone portion.

References Cited (Backward Citations)

US5317419A Cited
US5506699A Cited
US5630026A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-07-05 2003-01-04 2003-07-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-07-05 2007-01-04 2007-07-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-07-05 2011-01-04 2011-07-06 $7700.00 Window Closed / Lapsed

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