Patent US4287721A successfully refreshed from Google Patents.
Patent US5918040A successfully refreshed from Google Patents.
US5918040A
Expired / Lapsed
US
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Method for maintaining time synchronization between two processors in a network interface
Assignee: Enterasys Networks Inc
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Filing: 1995-07-25
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Granted: 1999-06-29
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Expires: 2015-07-25
Abstract
Abstract A method for performing timer synchronization between a first processor having a first timer and a second processor having a second timer is presented. The first processor issues to the second processor a first timer value corresponding to the current value of the first timer and the second timer compares the first timer value with a second timer value corresponding to the current value of the second timer. If the second timer value is less than the first timer value, the second processor increments the second timer value to a new second timer value equal to the first timer value. If the second timer value is greater than the first timer value, the second processor issues to the first processors the second timer value and the first processor adjusts the first timer value to be equal to the second timer value.
Inventors
- 👤 Neil Alasdair James Jarvis
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-10 02:24
CPC Classifications
G; G04; G04G; G04G7/00; H; H04; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/0635; H04J3/0638; H04J3/0658; H04J3/0661; H04J3/0667; H04L; H04L9/00; H04L9/40
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
211 words
A method for performing a timer synchronization operation in a computer system, the computer system including a first processor having a first timer coupled to a second processor having a second timer, comprising the steps of: the first processor issuing to the second processor a first timer value corresponding to a current value of the first timer; the second processor comparing the first timer value with a second timer value corresponding to a current value of the second timer; if the second timer value is greater than the first timer value, the second processor issuing to the first processor the second timer value and, responsive to receipt of the issued second timer value, the first processor adjusting the first timer value to be equal to the second timer value; and otherwise, performing the steps of: if the second timer value is less than the first timer value, the second processor incrementing the second timer value to a new second timer value equal to the first timer value; if the second timer value is equal to the first timer value, the second processor sending to the first processor an acknowledgment message indicating that the second timer value is equal to the first timer value; and the first processor completing the synchronization process.
Claim 2
Independent Claim
211 words
A method for performing a timer synchronization operation in a computer system, the computer system including a first processor having a first timer coupled to a second processor having a second timer, comprising the steps of: the first processor issuing to the second processor a first timer value corresponding to a current value of the first timer; the second processor comparing the first timer value with a second timer value corresponding to a current value of the second timer; if the second timer value is greater than the first timer value, the second processor issuing to the first processor the second timer value and, responsive to receipt of the issued second timer value, the first processor adjusting the first timer value to be equal to the second timer value; and otherwise, performing the steps of: if the second timer value is less than the first timer value, the second processor incrementing the second timer value to a new second timer value equal to the first timer value; if the second timer value is equal to the first timer value, the second processor sending to the first processor an acknowledgment message indicating that the second timer value is equal to the first timer value; and the first processor completing the synchronization process.
Claim 3
Dependent Claim
81 words
A method for performing a timer synchronization operation according to claim 1, wherein the step of the first processor completing the synchronization process includes the steps of: comparing the first timer value to the latest current value of the first timer; if the first timer value is equal to the latest current value of the first timer, then terminating the synchronization operation; and otherwise, returning to the step of the first processor issuing to the second processor a first timer value.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-06-28 | 2002-12-28 | 2003-06-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-06-28 | 2006-12-28 | 2007-06-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-06-28 | 2010-12-28 | 2011-06-29 | $7700.00 | Window Closed / Lapsed |