US5910967A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Pragmatic encoder and method therefor
Assignee: Intersil Americas LLC
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Filing: 1997-10-20
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Granted: 1999-06-08
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Expires: 2017-10-20
Abstract
Abstract A communication system (11) uses concatenated coding in which an inner code is configured to match the needs of an outer code. The inner code is implemented through a pragmatic trellis coded modulation encoder (18) and decoder (34). A parser (50) of the encoder (18) distributes fewer than one user information bit per unit interval (66) to a convolutional encoder (58) which generates at least two convolutionally encoded bits for each user information bit it processes. Exactly one of the convolutionally encoded bits is phase mapped (56) with at least two user information bits during each unit interval (66). The decoder (34) detects a frame sync pattern (48) inserted into the user information bits to resolve phase ambiguities. Phase estimates are convolutionally decoded (100) to provide decoded data estimates that are then used to selectively rotate the phase estimates prior to routing the phase estimates to a slice detector (118).
Inventors
- 👤 Mark J. Vanderaar
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 23:40
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/004; H04L1/0056; H04L1/0057; H03; H03M; H03M13/00; H03M13/03; H03M13/23; H03M13/25; H03M13/253; H03M13/256; H03M13/29; H03M13/2933; H03M13/33; H03M13/333; H04L1/0059; H04L1/006; H04L1/0064; H04L1/0065; H04L1/0071; H04L27/00; H04L27/18; H04L27/186
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
141 words
An apparatus for pragmatically encoding information bits to be communicated at a rate of three or more bits per unit interval, said apparatus comprising: a parsing circuit for distributing said information bits; a convolutional encoder coupled to said parsing circuit, said convolutional encoder being configured to produce at least two convolutionally encoded bits for each information bit processed through said convolutional encoder; a phase mapping circuit coupled to said parsing circuit, said phase mapping circuit being configured to receive at least two of said information bits from said parsing circuit per unit interval; and a multiplexing circuit, coupled between said convolutional encoder and said phase mapping circuit, said multiplexing circuit being configured to route no more than one of said convolutionally encoded bits produced for each information bit received by said convolutional encoder to said phase mapping circuit per unit interval.
Claim 2
Independent Claim
141 words
An apparatus for pragmatically encoding information bits to be communicated at a rate of three or more bits per unit interval, said apparatus comprising: a parsing circuit for distributing said information bits; a convolutional encoder coupled to said parsing circuit, said convolutional encoder being configured to produce at least two convolutionally encoded bits for each information bit processed through said convolutional encoder; a phase mapping circuit coupled to said parsing circuit, said phase mapping circuit being configured to receive at least two of said information bits from said parsing circuit per unit interval; and a multiplexing circuit, coupled between said convolutional encoder and said phase mapping circuit, said multiplexing circuit being configured to route no more than one of said convolutionally encoded bits produced for each information bit received by said convolutional encoder to said phase mapping circuit per unit interval.
Claim 3
Dependent Claim
34 words
An apparatus as claimed in claim 1 additionally comprising: a block encoder coupled to said parsing circuit so that said information bits are generated from said block encoder and said apparatus provides concatenated encoding.
Claim 4
Dependent Claim
40 words
An apparatus as claimed in claim 1 wherein: said phase mapping circuit has data inputs arranged from a least significant bit to a most significant bit; and said multiplexer couples to said least significant bit of said phase mapping circuit.
Claim 5
Dependent Claim
57 words
An apparatus as claimed in claim 1 wherein: said phase mapping circuit has data inputs arranged from a least significant bit to a most significant bit; and said phase mapping circuit is configured so that pairs of adjacent phase data mapped by said phase mapping circuit are generated from pairs of opposing polarity least significant bit inputs.
Claim 6
Dependent Claim
40 words
An apparatus as claimed in claim 4 wherein said multiplexer couples to said least significant bit data input of said phase mapping circuit so that said convolutionally encoded bits drive said least significant bit data input of said phase mapper.
Claim 7
Dependent Claim
43 words
An apparatus as claimed in claim 1 wherein said multiplexing circuit is further configured to route no less than one of said convolutionally encoded bits produced for each information bit received by said convolutional encoder to said phase mapping circuit per unit interval.
Claim 8
Dependent Claim
80 words
An apparatus as claimed in claim 1 wherein: said parsing circuit distributes one information bit to said convolutional encoder for each two unit intervals; said parsing circuit distributes four information bits to said phase mapping circuit for each two unit intervals; said convolutional encoder produces two convolutionally encoded bits for each two unit intervals; and said phase mapping circuit maps three bits for each unit interval so that said information bits are encoded in accordance with rate 5/6, 8-PSK modulation.
Claim 9
Dependent Claim
128 words
A pragmatic encoding method for coding information bits to be digitally communicated at a rate of three or more bits per unit interval, said method comprising the steps of: distributing a first portion of said information bits to a phase mapping circuit and a second portion of said information bits to a convolutional encoder, said first portion comprising at least two bits per unit interval and said second portion comprising less than one bit per unit interval; convolutionally encoding said second portion of said information bits so that at least one convolutionally encoded bit is produced per unit interval; and phase mapping said first portion of said information bits and said convolutionally encoded bits so that no more than one convolutionally encoded bit is mapped per unit interval.
Claim 10
Dependent Claim
128 words
A pragmatic encoding method for coding information bits to be digitally communicated at a rate of three or more bits per unit interval, said method comprising the steps of: distributing a first portion of said information bits to a phase mapping circuit and a second portion of said information bits to a convolutional encoder, said first portion comprising at least two bits per unit interval and said second portion comprising less than one bit per unit interval; convolutionally encoding said second portion of said information bits so that at least one convolutionally encoded bit is produced per unit interval; and phase mapping said first portion of said information bits and said convolutionally encoded bits so that no more than one convolutionally encoded bit is mapped per unit interval.
Claim 11
Dependent Claim
29 words
A pragmatic encoding method as claimed in claim 8 additionally comprising the step of block encoding said information bits prior to said distributing step to provide a concatenated code.
Claim 12
Dependent Claim
61 words
A pragmatic encoding method as claimed in claim 8 wherein: said phase mapping step is performed by a phase mapping circuit having data inputs arranged from a least significant bit to a most significant bit; said convolutionally encoding step produces a convolutionally encoded data stream; and said convolutionally encoded data stream drives said least significant bit of said phase mapping circuit.
Claim 13
Dependent Claim
116 words
A pragmatic encoding method as claimed in claim 8 wherein: said phase mapping step is configured to map a total of K bits during each unit interval, where K is an integer number greater than two, and said K bits are collectively obtained from said first portion of said information bits and said convolutionally encoded bits; and said mapping step is further configured so that convolutionally encoded bits of a first polarity are mapped to a phase of approximately (2n+1) (2π/2 K ), and convolutionally encoded bits of a second polarity are mapped to a phase of approximately (2n) (2π/2 K ), where n is an integer in the range of 0 to 2 K-1 -1.
Claim 14
Dependent Claim
25 words
A pragmatic encoding method as claimed in claim 8 wherein said phase mapping step maps no less than one convolutionally encoded bit per unit interval.
Claim 15
Dependent Claim
88 words
A pragmatic encoding method as claimed in claim 8 wherein: said distributing step distributes one information bit to said convolutional encoder for each two unit intervals; said distributing step distributes four information bits to said phase mapping circuit for each two unit intervals; said convolutionally encoding step produces said convolutionally encoded bits at a rate of one convolutionally encoded bit per unit interval; and said phase mapping step maps three bits per unit interval so that said information bits are encoded in accordance with rate 5/6, 8-PSK modulation.
Claim 16
Dependent Claim
151 words
A pragmatic encoding method for coding information bits to be digitally communicated at a rate of three or more bits per unit interval, said method comprising the steps of: block encoding said information bits to provide block encoded information bits; distributing a first portion of said block encoded information bits to a phase mapping circuit and a second portion of said block encoded information bits to a convolutional encoder, said first portion comprising at least two bits per unit interval and said second portion comprising less than one bit per unit interval; convolutionally encoding said second portion of said block encoded information bits so that at least one convolutionally encoded bit is produced per unit interval; and phase mapping said first portion of said block encoded stream of information bits and said convolutionally encoded bits so that no more or less than one convolutionally encoded bit is mapped per unit interval.
Claim 17
Dependent Claim
151 words
A pragmatic encoding method for coding information bits to be digitally communicated at a rate of three or more bits per unit interval, said method comprising the steps of: block encoding said information bits to provide block encoded information bits; distributing a first portion of said block encoded information bits to a phase mapping circuit and a second portion of said block encoded information bits to a convolutional encoder, said first portion comprising at least two bits per unit interval and said second portion comprising less than one bit per unit interval; convolutionally encoding said second portion of said block encoded information bits so that at least one convolutionally encoded bit is produced per unit interval; and phase mapping said first portion of said block encoded stream of information bits and said convolutionally encoded bits so that no more or less than one convolutionally encoded bit is mapped per unit interval.
Claim 18
Dependent Claim
116 words
A pragmatic encoding method as claimed in claim 14 wherein: said phase mapping step is configured to process a total of K bits during each unit interval, where K is an integer number greater than two, and said K bits are collectively obtained from said first portion of said block encoded information bits and said convolutionally encoded bits; and said mapping step is further configured so that convolutionally encoded bits of a first polarity are mapped to a phase of approximately (2n+1)(2π/2 K ), and convolutionally encoded bits of a second polarity are mapped to a phase of approximately (2n)(2π/2 K ), where n is an integer in the range of 0 to 2 K-1 -1.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-06-07 | 2002-12-07 | 2003-06-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-06-07 | 2006-12-07 | 2007-06-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-06-07 | 2010-12-07 | 2011-06-08 | $7700.00 | Window Closed / Lapsed |