Method and apparatus for resolving phase ambiguities in trellis coded modulated data

Claim 3

The apparatus of claim 1 wherein said third and fourth symbols respectively represent next-to-least significant and least significant symbols of said phase point data.

Claim 4

The apparatus of claim 1 wherein said set of input data bits is comprised of a pair of data bits and said set symbols is comprised of a pair of symbols.

Claim 5

The apparatus of claim 1 wherein said set of input data bits is comprised of three data bits and said set symbols comprised of a three symbols.

Claim 6

The apparatus of claim 1 wherein said input encoder means is a differential encoder.

Claim 7

The apparatus of claim 5 wherein said precoder means has a transfer function of 1/G 1 (D).

Claim 8

The apparatus of claim 6 wherein said output encoder means is a rate 1/2 convolutional encoder having encoder transfer functions of G 1 (D) and G 0 (D).

Claim 9

The apparatus of claim 5 wherein said output encoder means is a rate 1/2 convolutional encoder having encoder transfer functions of G 1 (D) and G 0 (D).

Claim 10

The apparatus of claim 1 wherein said precoder means has a transfer function of 1/G 1 (D).

Claim 11

The apparatus of claim 1 wherein said output encoder means is a rate 1/2 convolutional encoder having encoder transfer functions of G 1 (D) and G 0 (D).

Claim 12

A trellis encoder for generating phase data for M-ary PSK modulation comprising: a differential encoder having a plurality of inputs each for receiving a respective data bit of a set of input data bits, and a set of outputs; a precoder circuit having an input coupled to one output of said differential encoder and an output, said encoder circuit having a transfer function of 1/G 1 (D); and a convolutional encoder having an input coupled to said precoder circuit output and a pair of outputs, said convolutional encoder having transfer functions of G 1 (D) and G 0 (D).

Claim 13

A trellis encoder for generating phase data for M-ary PSK modulation comprising: a differential encoder having a plurality of inputs each for receiving a respective data bit of a set of input data bits, and a set of outputs; a precoder circuit having an input coupled to one output of said differential encoder and an output, said encoder circuit having a transfer function of 1/G 1 (D); and a convolutional encoder having an input coupled to said precoder circuit output and a pair of outputs, said convolutional encoder having transfer functions of G 1 (D) and G 0 (D).

Claim 14

The trellis encoder of claim 11 wherein a respective data symbol is provided at each other output of said differential encoder and each output of said convolutional encoder where said data symbols collectively form phase data.

Claim 15

The trellis encoder of claim 11 wherein said convolutional encoder is of a rate 1/2.

Claim 16

The trellis encoder of claim 13 wherein said differential encoder is a quadrature differential encoder having a pair of inputs and a pair of outputs.

Claim 17

The trellis encoder of claim 14 wherein a respective data symbol is provided at each other output of said differential encoder and each convolutional encoder output, where said data symbols collectively form phase data.

Claim 18

The trellis encoder of claim 13 wherein said differential encoder is an octal differential encoder having a trio of inputs and a trio of outputs.

Claim 19

The trellis encoder of claim 16 wherein a respective data symbol is provided at each other output of said differential encoder and each output of said convolutional encoder where said data symbols collectively form phase data.

Claim 20

The trellis encoder of claim 11 wherein said differential encoder is a quadrature differential encoder having a pair of inputs and a pair of outputs.

Claim 21

The trellis encoder of claim 11 wherein said differential encoder is an octal differential encoder having a trio of inputs and a trio of outputs.

Claim 24

The method of claim 20 wherein said step of encoding according to a first encoding format a set of input data bits comprises the step of differentially encoding said set of input data bits.

Claim 25

The method of claim 20 wherein said step of encoding said second symbol comprises the step of convolutionally encoding said second symbol.

Claim 26

In a decoder for decoding received user data that is trellis coded as phase point data in an M-ary modulation scheme for transmission upon a communication channel which is susceptible to changes in channel conditions so as to induce phase ambiguities in said M-ary modulated signals and resulting in corresponding errors in said phase point data as received, an apparatus for resolving the effect of phase ambiguity errors in said phase point data during the decoding of said trellis coded user data wherein said user data is trellis coded by encoding a set of user data bits according to a first encoding format to produce a set of symbols, encoding a first symbol of said set of symbols according to a transfer function of 1/G 1 (D) to produce a second symbol, encoding said second symbol according to transfer functions of G 1 (D) and G 0 (D) to produce third and fourth symbols wherein remaining symbols of said symbol set and said third and fourth symbols are transmitted as phase point data in an M-ary PSK modulated format, from which in the decoder phase point data is converted into estimates of said remaining symbols, and a Viterbi decoder generates from said phase point data an estimate of said second symbol, said apparatus comprising: first encoder means for receiving said second symbol estimate and encoding said second symbol estimate according to a transfer function of G 1 (D) to produce an estimate of said first symbol; and first decoder means for receiving an estimate of said remaining symbols and said first symbol estimate and decoding according to a first decoding format to produce an estimate of said user data.

Claim 27

In a decoder for decoding received user data that is trellis coded as phase point data in an M-ary modulation scheme for transmission upon a communication channel which is susceptible to changes in channel conditions so as to induce phase ambiguities in said M-ary modulated signals and resulting in corresponding errors in said phase point data as received, an apparatus for resolving the effect of phase ambiguity errors in said phase point data during the decoding of said trellis coded user data wherein said user data is trellis coded by encoding a set of user data bits according to a first encoding format to produce a set of symbols, encoding a first symbol of said set of symbols according to a transfer function of 1/G 1 (D) to produce a second symbol, encoding said second symbol according to transfer functions of G 1 (D) and G 0 (D) to produce third and fourth symbols wherein remaining symbols of said symbol set and said third and fourth symbols are transmitted as phase point data in an M-ary PSK modulated format, from which in the decoder phase point data is converted into estimates of said remaining symbols, and a Viterbi decoder generates from said phase point data an estimate of said second symbol, said apparatus comprising: first encoder means for receiving said second symbol estimate and encoding said second symbol estimate according to a transfer function of G 1 (D) to produce an estimate of said first symbol; and first decoder means for receiving an estimate of said remaining symbols and said first symbol estimate and decoding according to a first decoding format to produce an estimate of said user data.

Claim 28

The apparatus of claim 23 wherein said first symbol comprises one symbol and said remaining symbols comprise one symbol and said user data estimates comprise two bits.

Claim 29

The apparatus of claim 23 wherein said first symbol comprises one symbol and said remaining symbols comprise two symbols, and said user data estimate comprises three bits.

Claim 30

The apparatus in claim 23 wherein said first encoder means is a rate 1/2 convolutional encoder having encoder transfer functions of G 1 (D) and G 0 (D).

Claim 31

The apparatus of claim 26 wherein said first encoding format is quadrature differential encoding and said first decoder means is a quadrature differential decoder having a pair of inputs and a pair of outputs.

Claim 32

The apparatus of claim 26 wherein said first encoding format is octal differential encoding and said first decoder means is an octal differential decoder having three inputs and three outputs.

Claim 33

The apparatus of claim 23 wherein said first encoding format is quadrature differential encoding and said first decoder means is a quadrature differential decoder having a pair of inputs and a pair of outputs.

Claim 34

The apparatus of claim 23 wherein said first encoding format is octal differential encoding and said first decoder means is an octal differential decoder having three inputs and three outputs.

Claim 35

In a decoder for decoding trellis coded user data, said user data trellis encoded by differentially encoding a set of user data bits to produce a set of symbols, encoding a first symbol of said set of symbols according to a transfer function of 1/G 1 (D) to produce a second symbol, encoding said second encoded symbol according to respective transfer functions of G 1 (D) and G 0 (D) to produce third and fourth symbols wherein said remaining symbols of said symbol set and said third and fourth symbols are transmitted as phase point data in an M-ary PSK modulated format, on which in the decoder phase point data is converted into estimates of said remaining symbols, and a Viterbi decoder generates from said phase point data an estimate of said second symbol; a decoder for resolving phase ambiguity errors in said phase point data comprising; a convolutional encoder having an input for receiving said second symbol estimate, encoding said second symbol estimate according to a transfer function of G 1 (D) to produce an estimate of said first symbol of said symbol set; and a differential decoder having a set of first inputs for receiving an estimate of said remaining symbols of said symbol set and said first symbol estimate of said symbol set and decoding according to a first decoding format to produce estimates of said user data bits.

Claim 36

In a decoder for decoding trellis coded user data, said user data trellis encoded by differentially encoding a set of user data bits to produce a set of symbols, encoding a first symbol of said set of symbols according to a transfer function of 1/G 1 (D) to produce a second symbol, encoding said second encoded symbol according to respective transfer functions of G 1 (D) and G 0 (D) to produce third and fourth symbols wherein said remaining symbols of said symbol set and said third and fourth symbols are transmitted as phase point data in an M-ary PSK modulated format, on which in the decoder phase point data is converted into estimates of said remaining symbols, and a Viterbi decoder generates from said phase point data an estimate of said second symbol; a decoder for resolving phase ambiguity errors in said phase point data comprising; a convolutional encoder having an input for receiving said second symbol estimate, encoding said second symbol estimate according to a transfer function of G 1 (D) to produce an estimate of said first symbol of said symbol set; and a differential decoder having a set of first inputs for receiving an estimate of said remaining symbols of said symbol set and said first symbol estimate of said symbol set and decoding according to a first decoding format to produce estimates of said user data bits.

Claim 37

The decoder of claim 31 wherein said convolutional encoder is of a rate 1/2.

Claim 38

The decoder of claim 32 wherein said user data is differentially encoded by a quadrature differential encoder and said differential decoder is a quadrature differential decoder having a pair of inputs and a pair of outputs.

Claim 39

The decoder of claim 32 wherein said user data is differentially encoded by a octal differential encoder and said differential decoder is an octal differential decoder having three inputs and three outputs.

Claim 40

The decoder of claim 31 wherein said user data is differentially encoded by a quadrature differential encoder and said differential decoder is a quadrature differential decoder having a pair of inputs and a pair of outputs.

Claim 41

The decoder of claim 31 wherein said user data is differentially encoded by a octal differential encoder and said differential decoder is an octal differential decoder having three inputs and three outputs.

Claim 44

The method of claim 37 wherein said step of encoding according to said first encoding format comprises the step of convolutionally encoding said second symbol estimate according to a transfer function G 1 (D).

Claim 45

The method of claim 37 wherein said step of decoding according to said first decoding format comprises differentially decoding said remaining symbol estimates and said first symbol estimate.

Claim 46

A decoder comprising; converter means for converting and receiving a phase shifted data signal representative of user data encoded as trellis coded symbol data, into an estimate of said trellis coded symbol data, and for generating a corrected estimate of a first transfer function encoded symbol; encoder means for encoding said first transfer function encoded symbol corrected estimate according to a set of transfer functions to provide a set of reencoded trellis coded symbol estimates, wherein one transfer function of said set of transfer functions is an inverse of said first transfer function, and wherein said estimate of said reencoded trellis coded symbol estimates encoded according to said inverse of said first transfer function is provided as a first corrected symbol; sector logic means for responsive to said trellis coded symbol data estimate and said set of reencoded trellis coded symbol estimates for providing a remaining set of corrected symbols; and differential decoder means for differentially decoding said first corrected symbol and said remaining corrected symbol set to produce estimates of user data.

Claim 47

A decoder comprising; converter means for converting and receiving a phase shifted data signal representative of user data encoded as trellis coded symbol data, into an estimate of said trellis coded symbol data, and for generating a corrected estimate of a first transfer function encoded symbol; encoder means for encoding said first transfer function encoded symbol corrected estimate according to a set of transfer functions to provide a set of reencoded trellis coded symbol estimates, wherein one transfer function of said set of transfer functions is an inverse of said first transfer function, and wherein said estimate of said reencoded trellis coded symbol estimates encoded according to said inverse of said first transfer function is provided as a first corrected symbol; sector logic means for responsive to said trellis coded symbol data estimate and said set of reencoded trellis coded symbol estimates for providing a remaining set of corrected symbols; and differential decoder means for differentially decoding said first corrected symbol and said remaining corrected symbol set to produce estimates of user data.

Claim 48

The apparatus of claim 40 wherein said estimate of said trellis coded symbol data is comprised of three symbols, said corrected estimate of a precoded symbol is comprised of one symbol and said estimate of user data bit is comprised of two bits.

Claim 49

The apparatus of claim 40 wherein said estimate of said trellis coded symbol data is comprised of four symbols, said corrected estimate of a precoded symbol is comprised of one symbol and said estimate of user data bit is comprised of three bits.

Claim 50

The apparatus of claim 40 wherein said converter means is comprised of: an arc tangent lookup table memory having an input for receiving said phase shifted data signal and an output; a branch metrics lookup table memory having an input connected to said arc tangent lookup table memory output and an output; a sector value lookup table memory having one input connected to said arc tangent lookup table memory output and an output connected to said sector logic means; and a Viterbi decoder having and input connected to said branch metrics lookup table memory output and an output connected to said encoder means and said differential decoder means.

Claim 51

The apparatus of claim 43 wherein said encoder means is a rate 1/2 convolutional encoder having transfer functions of G 1 (D) and G 0 (D) with an input coupled to said Viterbi decoder output and a pair of outputs coupled to said sector logic means.

Claim 52

The apparatus of claim 44 wherein said sector logic means comprises: normalization and rate detection circuitry having an input connected to said Viterbi decoder output and an output; sector rotation logic having an input connected to said normalization and rate detection circuitry output and an output; and a trellis output mapper having an input connected to said sector rotation logic output.

Claim 53

The apparatus of claim 44 wherein said differential decoder means is a quadrature differential decoder having a pair of inputs respectively coupled to said convolutional encoder output and sector logic means and a pair of outputs.

Claim 54

The apparatus of claim 44 wherein said differential decoder means is a octal differential decoder having a pair of inputs connected to sector logic means and another input connected to said convolutional encoder means and three outputs.

Claim 55

The apparatus of claim 43 wherein said arc tangent lookup table memory converts said received phase shifted signal data into a corresponding phase angle estimate.

Claim 56

The apparatus of claim 48 wherein said branch metrics lookup table memory converts said phase angle estimate into a corresponding branch metric data.

Claim 57

The apparatus of claim 49 wherein said branch metrics lookup table memory is incorporated into said Viterbi decoder.

Claim 58

The apparatus of claim 48 wherein said sector value lookup table memory converts said phase angle estimate into said estimate of trellis coded symbol data.

Claim 59

The apparatus of claim 48 wherein said Viterbi decoder converts said branch metric data into said first corrected symbol.

Claim 60

The apparatus of claim 40 wherein said differential decoder means is a quadrature differential decoder having a pair of inputs respectively coupled to encoder means and sector logic means and a pair of outputs.

Claim 61

The apparatus of claim 40 wherein said differential decoder means is a octal differential decoder having a pair of inputs connected to sector logic means and another input connected to said encoder means and three outputs.