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US5909450A
Expired / Lapsed
US
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Tool to reconfigure pin connections between a dut and a tester
Assignee: Altera Corp
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Filing: 1997-11-14
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Granted: 1999-06-01
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Expires: 2017-11-14
Abstract
Abstract An improved method of simulating the testing of integrated circuits is provided. A database of desired connections between a tester unit and a DUT for different downbonds is accessed by a multiplexer which sets up the desired connections. The system automatically makes the correct connection for each downbond without manual intervention from the user as was required in traditional simulator systems.
Inventors
- 👤 Adam Wright
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 15:33
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/319; G01R31/31903; G01R31/31908; G01R31/31917; G01R31/31926
Claims Analysis
Total Claims: 29
Claim 1
Independent Claim
48 words
A method for testing a device under test ("DUT") comprising: selecting a DUT for test; providing a set of testing parameters; providing a database of pin mappings between said test parameters and said DUT; and selectively routing said test parameters to said DUT according to said pin mappings.
Claim 2
Independent Claim
48 words
A method for testing a device under test ("DUT") comprising: selecting a DUT for test; providing a set of testing parameters; providing a database of pin mappings between said test parameters and said DUT; and selectively routing said test parameters to said DUT according to said pin mappings.
Claim 3
Dependent Claim
12 words
The method of claim 1 wherein said DUT is an integrated circuit.
Claim 4
Dependent Claim
13 words
The method of claim 1 wherein said DUT is a programmable logic device.
Claim 5
Dependent Claim
14 words
The method of claim 1 wherein said DUT is simulated within a computer system.
Claim 6
Dependent Claim
88 words
A computer software product for testing a device under test ("DUT"), said computer software product residing on a storage medium and comprising: computer readable code causing a processor to select a DUT for test; computer readable code causing a processor to provide a set of testing parameters computer readable code causing a processor to provide a database of pin mappings between said test parameters and said DUT; and computer readable code causing a processor to selectively route said test parameters to said DUT according to said pin mappings.
Claim 7
Dependent Claim
88 words
A computer software product for testing a device under test ("DUT"), said computer software product residing on a storage medium and comprising: computer readable code causing a processor to select a DUT for test; computer readable code causing a processor to provide a set of testing parameters computer readable code causing a processor to provide a database of pin mappings between said test parameters and said DUT; and computer readable code causing a processor to selectively route said test parameters to said DUT according to said pin mappings.
Claim 8
Independent Claim
116 words
A method for simulating the testing of a device under test ("DUT") having a plurality of DUT pins, said DUT being coupled with a tester having a plurality of tester pins comprising the steps of: providing a DUT model, said DUT model being a computer software model of said DUT, said DUT model having a plurality of DUT model pins representing said plurality of DUT pins; creating a database comprising a pin map of desired connections between said plurality of tester pins and said plurality of DUT model pins; accessing said database to retrieve said pin map; and coupling said plurality of DUT model pins to said plurality of tester pins according to said pin map.
Claim 9
Independent Claim
116 words
A method for simulating the testing of a device under test ("DUT") having a plurality of DUT pins, said DUT being coupled with a tester having a plurality of tester pins comprising the steps of: providing a DUT model, said DUT model being a computer software model of said DUT, said DUT model having a plurality of DUT model pins representing said plurality of DUT pins; creating a database comprising a pin map of desired connections between said plurality of tester pins and said plurality of DUT model pins; accessing said database to retrieve said pin map; and coupling said plurality of DUT model pins to said plurality of tester pins according to said pin map.
Claim 10
Dependent Claim
33 words
The method of claim 6 wherein said database comprises a plurality of pin maps, each of said plurality of pin maps having desired connections between said tester pins and said DUT model pins.
Claim 11
Dependent Claim
59 words
The method of claim 6 wherein said coupling step further comprises the steps of: providing a multiplexer model; connecting said plurality of tester pins to said multiplexer model; connecting said plurality of DUT model pins to said multiplexer model; and coupling said DUT model pins to said tester pins through said multiplexer model in accordance with said pin map.
Claim 12
Dependent Claim
57 words
The method of claim 8 further comprising the steps of: providing a tester signal comprising a test waveform for a tester pin; sending said tester signal to said multiplexer model; transferring said tester signal to a particular DUT model pin in accordance with said pin map; and receiving said tester signal at said particular DUT model pin.
Claim 13
Dependent Claim
22 words
The method of claim 9 further comprising the steps of: translating said tester signal to a signal recognizable by said DUT model.
Claim 14
Dependent Claim
57 words
The method of claim 8 further comprising the steps of: providing a DUT signal comprising a test waveform for a DUT model pin; sending said DUT signal to said multiplexer model; transferring said DUT signal to a particular tester pin in accordance with said pin map; and receiving said DUT signal at said particular tester model pin.
Claim 15
Dependent Claim
21 words
The method of claim 11 further comprising the steps of: translating said DUT signal to a signal recognizable by said tester.
Claim 16
Dependent Claim
33 words
The method of claim 6 wherein said tester is a computer software model of a tester unit, said tester model having a plurality of tester model pins representing said plurality of tester pins.
Claim 17
Dependent Claim
100 words
The method of claim 13 wherein said database is stored in a random access memory, said plurality of DUT model pins being represented by a first set of software pointers, each of said first set of software pointers holding an address of a location in said database corresponding to a desired connection for a particular DUT model pin, said plurality of tester pins being represented by a second set of software pointers, each of said second set of software pointers holding an address of a location in said database corresponding to a desired connection for a particular tester model pin.
Claim 18
Dependent Claim
44 words
The method of claim 13 further comprising the step of: providing a plurality of shadow connections between said DUT model and said tester model, said plurality of shadow connections being connected between said DUT model and said tester model according to said pin map.
Claim 19
Dependent Claim
31 words
The method of claim 15 wherein said plurality of shadow connections corresponds to connections between output enable lines of said DUT model pins and output enable lines said tester model pins.
Claim 20
Dependent Claim
12 words
The method of claim 6 wherein said DUT is an integrated circuit.
Claim 21
Independent Claim
65 words
A method of simulating the testing of a device under test ("DUT"), said DUT being coupled with a tester comprising the steps of: providing a model of said DUT; sending a test signal recognizable by said tester from said tester to said DUT model; translating said test signal to a DUT signal recognizable by said DUT; and receiving said DUT signal at said DUT model.
Claim 22
Independent Claim
65 words
A method of simulating the testing of a device under test ("DUT"), said DUT being coupled with a tester comprising the steps of: providing a model of said DUT; sending a test signal recognizable by said tester from said tester to said DUT model; translating said test signal to a DUT signal recognizable by said DUT; and receiving said DUT signal at said DUT model.
Claim 23
Dependent Claim
32 words
The method of claim 18 wherein said test signal comprises a first bit and a second bit, said first bit and said second bit having a first state and a second state.
Claim 24
Dependent Claim
15 words
The method of claim 18 wherein said DUT signal has at least four unique states.
Claim 25
Dependent Claim
46 words
The method of claim 18 further comprising the steps of: sending a DUT signal recognizable by said DUT model from said DUT model to said tester; translating said DUT signal to a tester signal recognizable by said tester; and receiving said tester signal at said tester.
Claim 26
Dependent Claim
118 words
A test system for the testing of a device under test ("DUT"), said DUT having a DUT pin, said DUT being coupled with a tester having a tester pin comprising: a computer software model of said DUT, said DUT model having a DUT model pin corresponding to said DUT pin; a computer software model of said tester, said tester model having a tester model pin corresponding to said tester pin, said tester model pin being coupled with said DUT model pin; a shadow pin model connection whereby information relating to a state of an internal signal of said DUT model and an internal signal of said tester model is transferrable between said DUT model and said tester model.
Claim 27
Dependent Claim
118 words
A test system for the testing of a device under test ("DUT"), said DUT having a DUT pin, said DUT being coupled with a tester having a tester pin comprising: a computer software model of said DUT, said DUT model having a DUT model pin corresponding to said DUT pin; a computer software model of said tester, said tester model having a tester model pin corresponding to said tester pin, said tester model pin being coupled with said DUT model pin; a shadow pin model connection whereby information relating to a state of an internal signal of said DUT model and an internal signal of said tester model is transferrable between said DUT model and said tester model.
Claim 28
Dependent Claim
27 words
The test system of claim 22 wherein said DUT model internal signal is a signal reflecting the state of an output enable line for said DUT mode.
Claim 29
Dependent Claim
27 words
The test system of claim 22 wherein said tester model internal signal is a signal reflecting the state of an output enable line for said tester model.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-05-31 | 2002-11-30 | 2003-06-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-05-31 | 2006-11-30 | 2007-06-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-05-31 | 2010-11-30 | 2011-06-01 | $7700.00 | Window Closed / Lapsed |