US5909402A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit for driving/controlling sensing amplifier
Assignee: MagnaChip Semiconductor Ltd
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Filing: 1997-12-16
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Granted: 1999-06-01
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Expires: 2017-12-16
Abstract
Abstract Provided is a sensing amplifier driving/controlling circuit for supplying pull-up/down voltage to a sensing amplifier of a semiconductor memory device, including: a first switching device for connecting internal voltage to the first driving line which in turn applies high voltage to the sensing amplifier; a second switching device for connecting an external voltage to the first driving line which in turn applies high voltage to the sensing amplifier; a third switching device for connecting ground voltage to a second driving line which in turn applies ground voltage to the sensing amplifier; a comparator having an inverse input terminal which is connected to the first driving line and a non-inverse input terminal which receives a reference voltage and thus the comparator is enabled when receiving first and second control signals; an inverter for inverting the first control signal and applying the inverse signal to the control input terminal of the first switching device; and a NAND gate for receiving the outputs of the comparator and the first control signal with its input terminals and performing a NAND operation.
Inventors
- 👤 Yang-Sung Joo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 10:36
CPC Classifications
G; G11; G11C; G11C7/00; G11C7/06
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
102 words
A semiconductor device, comprising: a memory cell array; a sense amplifier array sensing bit lines of the cell array; and a controller controlling first and second driving lines of the sense amplifier array, the controller including, first and second drivers driving the first and second driving lines, respectively, based on a first control signal, a comparator, enabled based on the first control signal and a second control signal, comparing a first reference voltage and a voltage on the second driving line when enabled, and a voltage over-driver over driving the voltage on the second driving line based on output from the comparator.
Claim 2
Dependent Claim
102 words
A semiconductor device, comprising: a memory cell array; a sense amplifier array sensing bit lines of the cell array; and a controller controlling first and second driving lines of the sense amplifier array, the controller including, first and second drivers driving the first and second driving lines, respectively, based on a first control signal, a comparator, enabled based on the first control signal and a second control signal, comparing a first reference voltage and a voltage on the second driving line when enabled, and a voltage over-driver over driving the voltage on the second driving line based on output from the comparator.
Claim 3
Dependent Claim
17 words
The semiconductor device of claim 1, wherein the comparator is enabled for a predetermined period of time.
Claim 4
Dependent Claim
34 words
The semiconductor device of claim 1, wherein the comparator, when enabled, outputs a turn-on signal to the voltage over-driver when the first reference voltage is greater than the voltage on the second driving line.
Claim 5
Dependent Claim
34 words
The semiconductor device of claim 3, wherein the comparator, when enabled, outputs a turn-off signal to the voltage over-driver when the first reference voltage is less than the voltage on the second driving line.
Claim 6
Dependent Claim
34 words
The semiconductor device of claim 1, wherein the comparator, when enabled, outputs a turn-off signal to the voltage over-driver when the first reference voltage is less than the voltage on the second driving line.
Claim 7
Dependent Claim
23 words
The semiconductor device of claim 3, wherein the voltage over-driver is enabled by the output of the comparator and the first control signal.
Claim 8
Dependent Claim
27 words
The semiconductor device of claim 3, wherein the voltage over-driver is enabled by the output of the comparator, the first control signal, and the second control signal.
Claim 9
Dependent Claim
23 words
The semiconductor device of claim 1, wherein the voltage over-driver is enabled by the output of the comparator and the first control signal.
Claim 10
Dependent Claim
27 words
The semiconductor device of claim 1, wherein the voltage over-driver is enabled by the output of the comparator, the first control signal, and the second control signal.
Claim 11
Dependent Claim
33 words
The semiconductor device of claim 1, wherein the second driver is a voltage pull-up circuit enabled by the first control signal for pulling the second driving line up to a second reference voltage.
Claim 12
Dependent Claim
25 words
The semiconductor device of claim 1, wherein the first control signal is delayed by a predetermined period of time to produce the second control signal.
Claim 13
Dependent Claim
17 words
The semiconductor device of claim 11, wherein the comparator is enabled for the predetermined period of time.
Claim 14
Dependent Claim
27 words
The semiconductor device of claim 1, wherein the first control signal is delayed by a predetermined period of time and inverted to produce the second control signal.
Claim 15
Dependent Claim
17 words
The semiconductor device of claim 13, wherein the comparator is enabled for the predetermined period of time.
Claim 16
Dependent Claim
23 words
The semiconductor device of claim 1, wherein the comparator includes first and second enable inputs receiving the first and second control signals, respectively.
Claim 17
Dependent Claim
34 words
The semiconductor device of claim 1, further comprising: an AND gate receiving the first and second control signals; and wherein the comparator includes a single enable input receiving the output of the AND gate.
Claim 18
Dependent Claim
50 words
The semiconductor device of claim 1, further comprising: an inverter inverting the first control signal; an exclusive-OR gate receiving output from the inverter and the second control signal; and wherein the comparator includes first and second enable inputs receiving the first control signal and output from the exclusive-OR gate, respectively.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-05-31 | 2002-11-30 | 2003-06-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-05-31 | 2006-11-30 | 2007-06-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-05-31 | 2010-11-30 | 2011-06-01 | $7700.00 | Window Closed / Lapsed |