Patent US5905644A successfully refreshed from Google Patents.
US5905644A
Expired / Lapsed
US
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DC bus voltage controller
Assignee: Allen Bradley Co LLC
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Filing: 1998-07-31
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Granted: 1999-05-18
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Expires: 2018-07-31
Abstract
Abstract An apparatus for use with a switch-mode rectifier for minimizing DC bus voltage without causing current distortion, the apparatus monitoring rectifier saturation and decreasing DC bus voltage until the rectifier is near a saturation point and then maintaining the DC bus voltage at that point.
Inventors
- 👤 Vladimir Blasko
- 👤 Vikram Kaura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 21:10
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/02; H02M7/04; H02M7/12; H02M7/21; H02M7/217; H02M7/219; H02P; H02P21/00; H02P21/36; H02P27/00; H02P27/04; H02P27/06; H02P27/08
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
307 words
An apparatus for use with a motor controller, the controller including a PWM switch mode rectifier linked to a utility grid which provides three utility supplied rectifier input AC voltages at rectifier inputs, the rectifier also linked to a DC bus for generating DC voltage on the bus, the controller using rectifier input current feedback signals, DC bus voltage feedback signals and a DC command signal to generate a synchronous signal set including synchronous d and q-axis voltage signals, using the synchronous set to generate a stationary signal set including stationary d and q-axis voltage signals, using the stationary set to generate a modulating signal set including first, second and third modulating signals, providing a triangle carrier signal having a peak amplitude, comparing the modulating signals to the carrier signal to generate control signals for the rectifier to convert the utility supplied input voltages to DC voltage on the DC bus, each of the synchronous, stationary and modulating sets being an intermediate set, the apparatus for limiting the DC voltage to a minimum DC voltage required to generate rectifier input voltages which are greater than the utility supplied input voltages, the apparatus comprising: an amplitude signal generator receiving a first intermediate set's signals and generating an amplitude signal, the first intermediate set's signals defining a vector having a vector amplitude, the amplitude signal being a function of the vector amplitude; a reference signal generator which generates a reference signal as a function of the carrier signal peak amplitude; a first summer mathematically combining the reference signal and the amplitude signal generating an error signal; a regulator receiving the error signal and providing a correction signal as a function of the error signal; and a second summer mathematically combining the command signal and the correction signal generating a modified command signal representing the minimum DC bus voltage signal.
Claim 2
Independent Claim
307 words
An apparatus for use with a motor controller, the controller including a PWM switch mode rectifier linked to a utility grid which provides three utility supplied rectifier input AC voltages at rectifier inputs, the rectifier also linked to a DC bus for generating DC voltage on the bus, the controller using rectifier input current feedback signals, DC bus voltage feedback signals and a DC command signal to generate a synchronous signal set including synchronous d and q-axis voltage signals, using the synchronous set to generate a stationary signal set including stationary d and q-axis voltage signals, using the stationary set to generate a modulating signal set including first, second and third modulating signals, providing a triangle carrier signal having a peak amplitude, comparing the modulating signals to the carrier signal to generate control signals for the rectifier to convert the utility supplied input voltages to DC voltage on the DC bus, each of the synchronous, stationary and modulating sets being an intermediate set, the apparatus for limiting the DC voltage to a minimum DC voltage required to generate rectifier input voltages which are greater than the utility supplied input voltages, the apparatus comprising: an amplitude signal generator receiving a first intermediate set's signals and generating an amplitude signal, the first intermediate set's signals defining a vector having a vector amplitude, the amplitude signal being a function of the vector amplitude; a reference signal generator which generates a reference signal as a function of the carrier signal peak amplitude; a first summer mathematically combining the reference signal and the amplitude signal generating an error signal; a regulator receiving the error signal and providing a correction signal as a function of the error signal; and a second summer mathematically combining the command signal and the correction signal generating a modified command signal representing the minimum DC bus voltage signal.
Claim 3
Dependent Claim
35 words
The apparatus of claim 1 wherein the first summer mathematically combines by subtracting the amplitude signal from the reference signal and the second summer mathematically combines by subtracting the correction signal from the command signal.
Claim 4
Dependent Claim
56 words
The apparatus of claim 2 wherein the first intermediate set is the stationary set and the amplitude signal generator generates the amplitude signal by squaring the stationary d-axis voltage signal to provide a first squared signal, squaring the stationary q-axis voltage signal to provide a second squared signal and adding the first and second squared signals.
Claim 5
Dependent Claim
27 words
The apparatus of claim 1 wherein the reference signal generator generates the reference signal by multiplying the peak amplitude by a constant k and squaring the product.
Claim 6
Dependent Claim
12 words
The apparatus of claim 4 wherein the value k can be modified.
Claim 7
Dependent Claim
21 words
The apparatus of claim 5 wherein the rectifier is controlled according to the sinusoidal PWM control method and k is 1.0.
Claim 8
Dependent Claim
21 words
The apparatus of claim 5 wherein the rectifier is controlled according to the space vector method and k is essentially 1.154.
Claim 9
Dependent Claim
12 words
The apparatus of claim 1 wherein the regulator is a proportional-integral controller.
Claim 10
Dependent Claim
34 words
The apparatus of claim 7 wherein, when the error signal is negative, the correction signal is zero and when the error signal is positive, the correction signal is linearly related to the error signal.
Claim 11
Independent Claim
288 words
A method for use with a motor controller, the controller including a PWM switch mode rectifier linked to a utility grid which provides three utility supplied rectifier input AC voltages at rectifier inputs, the rectifier also linked to a DC bus for generating DC voltage on the bus, the controller using rectifier input current feedback signals, DC bus voltage feedback signals and a DC command signal to generate a synchronous signal set including synchronous d and q-axis voltage signals, using the synchronous set to generate a stationary signal set including stationary d and q-axis voltage signals, using the stationary set to generate a modulating signal set including first, second and third modulating signals, providing a triangle carrier signal having a peak amplitude, comparing the modulating signals to the carrier signal to generate control signals for the rectifier to convert the utility supplied input voltages to DC voltage on the DC bus, each of the synchronous, stationary and modulating sets being an intermediate set, the method for limiting the DC voltage to a minimum DC voltage required to generate rectifier input voltages which are greater than the utility supplied input voltages, the method comprising the steps of: receiving a first intermediate set's signals and generating an amplitude signal, the first intermediate set's signals defining a vector having a vector amplitude, the amplitude signal being a function of the vector amplitude; generating a reference signal as a function of the carrier signal peak amplitude; mathematically combining the reference signal and the amplitude signal generating an error signal; providing a correction signal as a function of the error signal; and mathematically combining the command signal and the correction signal generating a modified command signal representing the minimum DC bus voltage signal.
Claim 12
Independent Claim
288 words
A method for use with a motor controller, the controller including a PWM switch mode rectifier linked to a utility grid which provides three utility supplied rectifier input AC voltages at rectifier inputs, the rectifier also linked to a DC bus for generating DC voltage on the bus, the controller using rectifier input current feedback signals, DC bus voltage feedback signals and a DC command signal to generate a synchronous signal set including synchronous d and q-axis voltage signals, using the synchronous set to generate a stationary signal set including stationary d and q-axis voltage signals, using the stationary set to generate a modulating signal set including first, second and third modulating signals, providing a triangle carrier signal having a peak amplitude, comparing the modulating signals to the carrier signal to generate control signals for the rectifier to convert the utility supplied input voltages to DC voltage on the DC bus, each of the synchronous, stationary and modulating sets being an intermediate set, the method for limiting the DC voltage to a minimum DC voltage required to generate rectifier input voltages which are greater than the utility supplied input voltages, the method comprising the steps of: receiving a first intermediate set's signals and generating an amplitude signal, the first intermediate set's signals defining a vector having a vector amplitude, the amplitude signal being a function of the vector amplitude; generating a reference signal as a function of the carrier signal peak amplitude; mathematically combining the reference signal and the amplitude signal generating an error signal; providing a correction signal as a function of the error signal; and mathematically combining the command signal and the correction signal generating a modified command signal representing the minimum DC bus voltage signal.
Claim 13
Dependent Claim
55 words
The method of claim 10 wherein the step of mathematically combining the reference signal and the amplitude signal include the step of subtracting the amplitude signal from the reference signal and the step of mathematically combining the command signal and the correction signal include the step of subtracting the correction signal from the command signal.
Claim 14
Dependent Claim
58 words
The method of claim 11 wherein the first intermediate set is the stationary set and the step of generating an amplitude signal includes the steps of squaring the stationary d-axis voltage signal to provide a first squared signal, squaring the stationary q-axis voltage signal to provide a second squared signal and adding the first and second squared signals.
Claim 15
Dependent Claim
29 words
The method of claim 10 wherein the step of generating the reference signal includes the step of multiplying the peak amplitude by a constant k and squaring the product.
Claim 16
Dependent Claim
12 words
The method of claim 13 wherein the value k can be modified.
Claim 17
Dependent Claim
21 words
The method of claim 14 wherein the rectifier is controlled according to the sinusoidal PWM control method and k is 1.0.
Claim 18
Dependent Claim
21 words
The method of claim 14 wherein the rectifier is controlled according to the space vector method and k is essentially 1.154.
Claim 19
Dependent Claim
34 words
The method of claim 10 wherein, when the error signal is negative, the correction signal is zero and when the error signal is positive, the correction signal is linearly related to the error signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-05-17 | 2002-11-16 | 2003-05-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-05-17 | 2006-11-16 | 2007-05-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-05-17 | 2010-11-16 | 2011-05-18 | $7700.00 | Window Closed / Lapsed |