Remote program monitor method and system using a system-under-test microcontroller for self-debug

Claim 2

A remote program monitor system using a system-under-test microcontroller for self-debug, said remote program monitor system comprising: a host computer; a system-under-test (SUT) that includes a read-only memory (ROM) and a microcontroller for executing a program under test, the microcontroller having an interrupt input, wherein one or more enable debugger signals received at the interrupt input causes the microcontroller to execute a debugger program contained in the ROM, said debugger program monitoring execution by the microcontroller of instructions within said program under test and selectively performing a debug operation in response to execution of a selected instruction in said program under test, and wherein one or more other enable debugger and disable debugger signals limit the debut functions of the debugger program such that interference with the real-time operation of the program under test is minimized; and a standard serial connection between the host computer and the SUT.

Claim 3

A system according to claim 1, wherein the serial connection transmits a disable debugger command to the debugger program to issue a disable debugger signal to an interrupt input of the microcontroller, wherein the microcontroller cancels execution of the debugger program to allow real-time target system operation to commence when a disable debugger signal is received on the interrupt input.

Claim 4

A system according to claim 1, wherein the serial connection transmits the program under test from the host computer to the SUT.

Claim 5

A system according to claim 1, wherein the host computer includes a debugger application that executes within the host computer and interacts with the debugger program to perform monitoring and debugging functions.

Claim 6

A system according to claim 1, wherein a packet of data transmitted over the serial connection to the SUT includes a field indicating whether the packet is directed to the debugger program or a program under test being executed by the SUT.

Claim 7

A system according to claim 1, wherein the SUT further comprises a memory for storing the program under test.

Claim 8

A system according to claim 1, wherein one or more debugger signals are strategically issued at key locations within the program under test to monitor portions of the program under test suspected of containing errors, thereby allowing full real-time operation of the remainder of the program under test.

Claim 9

A system according to claim 1, wherein one or more debugger commands transmitted by the host invoke the debugger program to issue enable debugger and disable debugger signals.

Claim 10

A system according to claim 1, wherein debug operations that can be performed by said debugger program include halting execution of said program under test by said microcontroller at a selected breakpoint.

Claim 13

A method according to claim 10, further comprising the step of canceling execution of the debugger program to allow real-time target system operation to commence when a disable debugger signal is received.

Claim 14

A method according to claim 10, further comprising the step of transmitting the program under test from a host computer to the SUT over a serial connection.

Claim 15

A method according to claim 10, wherein a host computer includes a debugger application that executes within the host computer and interacts with the debugger program to perform monitoring and debugging functions.

Claim 16

A method according to claim 10, wherein a packet of data transmitted over a serial connection between a host computer and the SUT includes a field indicating whether the packet is directed to the debugger program or a program under test being executed by the SUT.

Claim 17

A method according to claim 10, further comprising the step of storing the program under test in a memory in the SUT.

Claim 18

A method according to claim 10, wherein one or more enable debugger and disable debugger signals are issued by the debugger program.

Claim 19

A method according to claim 10, wherein one or more enable debugger and disable debugger commands transmitted by a host computer invoke the debugger program to issue enable debugger and disable debugger signals.

Claim 20

A method according to claim 10, wherein selectively performing a debug operation can comprise halting execution of said program under test by said microcontroller at a selected breakpoint.

Claim 21

A program product for remote program monitoring using a system-under-test microcontroller for self-debug, said program product comprising: a computer usable medium having instruction means embodied in the medium, the instruction means including: instruction means for receiving one or more debugger signals as an interrupt input to a system-under-test (SUT) that includes a read-only memory (ROM) and a microcontroller for executing a program under test; instruction means, responsive to receipt of said one or more debugger signals, for causing the microcontroller to execute a debugger program contained in the ROM, wherein the debugger program monitors execution by the microcontroller of instructions within said program under test and selectively performs a debug operation in response to execution of a selected instruction in said program under test; and instruction means, responsive to receipt of one or more other enable debugger and disable debugger signals, for causing the microcontroller To limit the debug functions of the debugger program such that interference with the real-time operation of the program under test is minimized.

Claim 22

A program product for remote program monitoring using a system-under-test microcontroller for self-debug, said program product comprising: a computer usable medium having instruction means embodied in the medium, the instruction means including: instruction means for receiving one or more debugger signals as an interrupt input to a system-under-test (SUT) that includes a read-only memory (ROM) and a microcontroller for executing a program under test; instruction means, responsive to receipt of said one or more debugger signals, for causing the microcontroller to execute a debugger program contained in the ROM, wherein the debugger program monitors execution by the microcontroller of instructions within said program under test and selectively performs a debug operation in response to execution of a selected instruction in said program under test; and instruction means, responsive to receipt of one or more other enable debugger and disable debugger signals, for causing the microcontroller To limit the debug functions of the debugger program such that interference with the real-time operation of the program under test is minimized.

Claim 23

A program product according to claim 19, further comprising instruction means for canceling execution of the debugger program to allow real-time target system operation to commence when a disable debugger signal is received.

Claim 24

A computer program product according to claim 19, further comprising instruction means for transmitting the program under test from a host computer to the SUT over a serial connection.

Claim 25

A program product according to claim 19, and further comprising a debugger application for execution within the host computer that interacts with the debugger program to perform monitoring and debugging functions.

Claim 26

A program product according to claim 19, wherein a packet of data transmitted over a serial connection between a host computer and the SUT includes a field indicating whether the packet is directed to the debugger program or a program under test being executed by the SUT.

Claim 27

A program product according to claim 19, further comprising instruction means for storing the program under test in a memory in the SUT.

Claim 28

A program product according to claim 19, wherein one or more enable debugger and disable debugger signals are issued by the debugger program.

Claim 29

A program product according to claim 19, wherein one or more enable debugger and disable debugger commands transmitted by a host computer invoke the debugger program to issue enable debugger and disable debugger signals.

Claim 30

A program product according to claim 19, wherein selectively performing a debug operation can comprise halting execution of said program under test by said microcontroller at a selected breakpoint.