Packet network interface

Abstract

Abstract A packet switch interface, which may be an asynchronous transfer mode (ATM) layer interface chip, may be connected to the inputs or the outputs of a packet switch. The interface chip modifies the virtual path identifier and the virtual channel identifier in packets directed to and from the switch. The interface chip also manipulates routing tags for the packets which are used for internal routing purposes in the switch. The interface chip includes a local interface through which packets may be extracted from or added to a packet stream flowing between a main input and a main output of the interface. The interface chip polices different communications channels handled in the interface chip by detecting whether traffic in those channels exceeds certain network usage parameters. The interface is also capable of gathering certain statistical information about the traffic in certain communications channels to allow evaluation of network performance. These operations are performed in hardware on a single integrated circuit chip involving a single table look up. This table look up involves addressing a content addressable memory with a predetermined portion of the header of a packet. Finding a match between the predetermined portion of the packet header and the content of the content addressable memory causes the memory to produce an address signal which acts as a pointer to a location in a random address memory containing a parameter block having data used to perform the operations of the interface.

Inventors

• 👤 Vijay P. Kumar
• 👤 Horng-Dar Lin
• 👤 Jay Henry O'Neill
• 👤 Philippe Oechslin
• 👤 Edward Joseph Ouellette, III

Bibliographic Details