US5889903A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and apparatus for distributing an optical clock in an integrated circuit
Assignee: Intel Corp
•
Filing: 1998-05-14
•
Granted: 1999-03-30
•
Expires: 2018-05-14
Abstract
Abstract A method and an apparatus for optically clocking an integrated circuit in a semiconductor. In one embodiment, a laser is configured to emit infrared laser pulses at a desired clock frequency. The laser pulses are separated into a plurality of split laser pulses, each of which are focused through the back side of a C4 packaged integrated circuit die into P-N junctions distributed throughout the integrated circuit die. Each P-N junction locally generates a photocurrent in response to the split laser beams. Each of the photocurrents are locally converted into voltages and thus into local clock signals, which are used to clock the local area of the integrated circuit. With the presently described optical clocking technique, the local clock signals have extremely low clock skew. The presently described technique may be employed in integrated circuits system-wide, in multi-chip modules, or in an individual integrated circuit. By removing the global clock distribution network from the silicon, the present invention allows chip area used in the prior art for a global clock distribution networks to be used instead for signal routing or allows overall die sizes to be reduced.
Inventors
- 👤 Vallur R. Rao
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 12:44
CPC Classifications
G; G02; G02B; G02B6/00; G02B6/24; G02B6/42; G02B6/43; G06; G06F; G06F1/00; G06F1/04; G06F1/10; G06F1/105
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
81 words
An optical clock distribution network, comprising: a first photo detector disposed in a first semiconductor having at least a front side and a back side, the first photo detector configured to receive laser pulses through the back side of the first semiconductor; and a first current to voltage converter coupled to the first photo detector, the first current to voltage converter to generate a first clock signal to clock a first area of an integrated circuit disposed in the first semiconductor.
Claim 2
Dependent Claim
81 words
An optical clock distribution network, comprising: a first photo detector disposed in a first semiconductor having at least a front side and a back side, the first photo detector configured to receive laser pulses through the back side of the first semiconductor; and a first current to voltage converter coupled to the first photo detector, the first current to voltage converter to generate a first clock signal to clock a first area of an integrated circuit disposed in the first semiconductor.
Claim 3
Dependent Claim
30 words
The optical clock distribution network described in claim 1 further comprising a first buffer coupled between the first current to voltage converter and the first area of the integrated circuit.
Claim 4
Dependent Claim
54 words
The optical clock distribution network described in claim 1 wherein the first semiconductor includes portions that define a recess in the back side of the first semiconductor proximate to the first photo detector, the recess reducing attenuation of the laser pulses through the back side of the first semiconductor into the first photo detector.
Claim 5
Dependent Claim
21 words
The optical clock distribution network described in claim 3 wherein the recess is back filled with a visible light transparent material.
Claim 6
Dependent Claim
15 words
The optical clock distribution network described in claim 1 wherein the first semiconductor comprises silicon.
Claim 7
Independent Claim
82 words
A method for optically clocking an integrated circuit in a semiconductor having at least front and back sides, the method comprising the steps of: receiving master laser pulses having a master clock frequency through the back side of the semiconductor into a first photo detector disposed in the semiconductor; converting a current generated in the first photo detector in response to the master laser pulses into a clock signal; and clocking a first area of the integrated circuit disposed in the semiconductor.
Claim 8
Independent Claim
82 words
A method for optically clocking an integrated circuit in a semiconductor having at least front and back sides, the method comprising the steps of: receiving master laser pulses having a master clock frequency through the back side of the semiconductor into a first photo detector disposed in the semiconductor; converting a current generated in the first photo detector in response to the master laser pulses into a clock signal; and clocking a first area of the integrated circuit disposed in the semiconductor.
Claim 9
Dependent Claim
32 words
The method described in claim 6 including the additional step of buffering the clock signal after the step of converting the current generated in the first photo detector in the clock signal.
Claim 10
Dependent Claim
66 words
The method described in claim 6 including the additional step of: splitting the master laser pulses into first and second split laser pulses; wherein the step of receiving master laser pulses having the master clock frequency through the back side of the semiconductor includes the step of receiving the first and second split laser pulses into the first photo detector and a second photo detector respectively.
Claim 11
Dependent Claim
32 words
The method described in claim 8 wherein the first and second photo detectors are disposed in the semiconductor, the second split laser pulses being focused through the back side of the semiconductor.
Claim 12
Dependent Claim
39 words
The method described in claim 8 wherein the second photo detector is disposed in a second semiconductor having at least front and back sides, the second split laser pulses being received through the back side of the second semiconductor.
Claim 13
Dependent Claim
46 words
The method described in claim 10 including the additional steps of: converting a current generated in the second photo detector in response to the second split laser pulses into the clock signal; and clocking a second area of an integrated circuit disposed in the second semiconductor.
Claim 14
Dependent Claim
44 words
The method described in claim 6 including the step of thinning a portion of semiconductor proximate to the first photo detector and so as to reduce attenuation of the master laser pulses through the back side of the semiconductor into the first photo detector.
Claim 15
Dependent Claim
89 words
An optical clock distribution network, comprising: a first photo detector disposed in a first semiconductor having at least front and back sides; a mode locked laser configured to emit master laser pulses at a master clock frequency through the back side of the first semiconductor into the first photo detector; and a first current to voltage converter coupled to the first photo detector, the first current to voltage converter generating a first clock signal configured to clock a first area of an integrated circuit disposed in the first semiconductor.
Claim 16
Dependent Claim
89 words
An optical clock distribution network, comprising: a first photo detector disposed in a first semiconductor having at least front and back sides; a mode locked laser configured to emit master laser pulses at a master clock frequency through the back side of the first semiconductor into the first photo detector; and a first current to voltage converter coupled to the first photo detector, the first current to voltage converter generating a first clock signal configured to clock a first area of an integrated circuit disposed in the first semiconductor.
Claim 17
Dependent Claim
30 words
The optical clock distribution network described in claim 13 further comprising a first buffer coupled between the first current to voltage converter and the first area of the integrated circuit.
Claim 18
Dependent Claim
194 words
An optical clock distribution network, comprising: a first photo detector disposed in a first semiconductor having at least front and back sides; a second photo detector disposed in the first semiconductor; a laser configured to emit master laser pulses at a master clock frequency through the back side of the first semiconductor into the first and second photo detectors; a first current to voltage converter coupled to the first photo detector, the first current to voltage converter generating a first clock signal configured to clock a first area of an integrated circuit disposed in the first semiconductor; a second current to voltage converter coupled to the second photo detector, the second current to voltage converter generating a second clock signal configured to clock a second area of the integrated circuit in the first semiconductor, the first and second clock signals having the master clock frequency; and an optics element coupled between the laser and the first and second photo detectors, the optics element configured to split the master laser pulses into first and second split laser pulses focused through the back side of the first semiconductor into the first and second photo detectors respectively.
Claim 19
Dependent Claim
194 words
An optical clock distribution network, comprising: a first photo detector disposed in a first semiconductor having at least front and back sides; a second photo detector disposed in the first semiconductor; a laser configured to emit master laser pulses at a master clock frequency through the back side of the first semiconductor into the first and second photo detectors; a first current to voltage converter coupled to the first photo detector, the first current to voltage converter generating a first clock signal configured to clock a first area of an integrated circuit disposed in the first semiconductor; a second current to voltage converter coupled to the second photo detector, the second current to voltage converter generating a second clock signal configured to clock a second area of the integrated circuit in the first semiconductor, the first and second clock signals having the master clock frequency; and an optics element coupled between the laser and the first and second photo detectors, the optics element configured to split the master laser pulses into first and second split laser pulses focused through the back side of the first semiconductor into the first and second photo detectors respectively.
Claim 20
Dependent Claim
234 words
An optical clock distribution network, comprising: a first photo detector disposed in a first semiconductor having at least front and back sides; a second photo detector disposed in a second semiconductor having at least front and back sides; a laser configured to emit master laser pulses at a master clock frequency through the back side of the first semiconductor into the first photo detector and through the back side of the second semiconductor into the second photo detector; a first current to voltage converter coupled to the first photo detector, the first current to voltage converter generating a first clock signal configured to clock a first area of an integrated circuit disposed in the first semiconductor; a second current to voltage converter coupled to the second photo detector, the second current to voltage converter generating a second clock signal configured to clock a second area of an integrated circuit in the second semiconductor, the first and second clock signals having the master clock frequency; and an optics element coupled between the laser and the first and second photo detectors, the optics element configured to split the master laser pulses into first and second split laser pulses, the first split laser pulses focused through the back side of the first semiconductor into the first photo detector, the second split laser pulses focused through the back side of the second semiconductor into the second photo detector.
Claim 21
Dependent Claim
234 words
An optical clock distribution network, comprising: a first photo detector disposed in a first semiconductor having at least front and back sides; a second photo detector disposed in a second semiconductor having at least front and back sides; a laser configured to emit master laser pulses at a master clock frequency through the back side of the first semiconductor into the first photo detector and through the back side of the second semiconductor into the second photo detector; a first current to voltage converter coupled to the first photo detector, the first current to voltage converter generating a first clock signal configured to clock a first area of an integrated circuit disposed in the first semiconductor; a second current to voltage converter coupled to the second photo detector, the second current to voltage converter generating a second clock signal configured to clock a second area of an integrated circuit in the second semiconductor, the first and second clock signals having the master clock frequency; and an optics element coupled between the laser and the first and second photo detectors, the optics element configured to split the master laser pulses into first and second split laser pulses, the first split laser pulses focused through the back side of the first semiconductor into the first photo detector, the second split laser pulses focused through the back side of the second semiconductor into the second photo detector.
References Cited (Backward Citations)
US5009476A
Cited
US5017794A
Cited
US5349599A
Cited
US5508835A
Cited
US5442475A
Cited
US5208879A
Cited
US5532813A
Cited
US5537498A
Cited
US5546496A
Cited
US5416861A
Cited
US5568574A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-03-29 | 2002-09-28 | 2003-03-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-03-29 | 2006-09-28 | 2007-03-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-03-29 | 2010-09-28 | 2011-03-30 | $7700.00 | Window Closed / Lapsed |