Patent US5889677A successfully refreshed from Google Patents.
US5889677A
Expired / Lapsed
US
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Circuit designing apparatus of an interactive type
Assignee: Fujitsu Ltd
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Filing: 1995-12-19
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Granted: 1999-03-30
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Expires: 2015-12-19
Abstract
Abstract A circuit designing apparatus of an interactive type which enables a simplified and high-speed circuit design process while largely reducing a burden on a designer, having a speed analyzing unit for conducting a delay computation for each wiring path on a circuit to be designed and a display control unit for displaying a result of the delay computation by the speed analyzing unit on a display unit. When the speed analyzing unit conducts a delay computation, a delay value of each logic component forming the circuit that is an object of the design is set and altered according to a dullness of a signal waveform inputted to the logic component. The circuit designing apparatus of an interactive type may be applied to a system for conducting a circuit design of an integrated circuit such as an LSI or the like or a printed circuit board.
Inventors
- 👤 Mitsuru Yasuda
- 👤 Hiroyuki Sugiyama
- 👤 Noriyuki Ito
- 👤 Ryoichi Yamashita
- 👤 Tadashi Konno
- 👤 Yasunori Abe
- 👤 Naomi Bizen
- 👤 Terunobu Maruyama
- 👤 Yoshiyuki Kato
- 👤 Tomoyuki Isomura
- 👤 Hiroshi Ikeda
- 👤 Miki Takagi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:33
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/32; G06F30/33
Claims Analysis
Total Claims: 85
Claim 1
Independent Claim
153 words
A circuit designing apparatus of an interactive type having a display unit for displaying circuit design steps and an input unit for inputting responsive information to displayed data on said display unit and information necessary for designing a circuit having a plurality of wiring paths in order to conduct said circuit design in an interactive form comprising: a speed analyzing unit for conducting a delay computation for each said wiring path on said circuit to be designed; and a display control unit for causing said display unit to display a result of the delay computation by said speed analyzing unit, wherein, wherever said speed analyzing unit conducts a delay computation, a delay value for each logic component forming said circuit to be designed is set and altered according to a slew rate of a signal waveform inputted to said logic component based on the amount of capacitance in said circuit to be designed.
Claim 2
Dependent Claim
153 words
A circuit designing apparatus of an interactive type having a display unit for displaying circuit design steps and an input unit for inputting responsive information to displayed data on said display unit and information necessary for designing a circuit having a plurality of wiring paths in order to conduct said circuit design in an interactive form comprising: a speed analyzing unit for conducting a delay computation for each said wiring path on said circuit to be designed; and a display control unit for causing said display unit to display a result of the delay computation by said speed analyzing unit, wherein, wherever said speed analyzing unit conducts a delay computation, a delay value for each logic component forming said circuit to be designed is set and altered according to a slew rate of a signal waveform inputted to said logic component based on the amount of capacitance in said circuit to be designed.
Claim 3
Dependent Claim
99 words
The circuit designing apparatus of a interactive type according to claim 1 further comprising: a path trace unit for tracing a wiring path connected to a predetermined pin designated according to an instruction through said input unit from said pin, wherein said path trace unit conducts a tracing process of the wiring path, and said speed analyzing unit simultaneously conducts a delay computation of said wiring path while calculating the slew rate of a signal waveform varying along said wiring path to set a delay value of a logic component on said wiring path according to said slew rate.
Claim 4
Dependent Claim
86 words
The circuit designing apparatus of an interactive type according to claim 2, wherein said display control unit causes said display unit to display a result of a trace by said path trace unit as a schematic destination route diagram, and causes said display unit to display a result of a delay computation by said speed analyzing unit corresponding to the result of said trace as a graph representing a delay value and an accumulated delay value corresponding to a position in said schematic destination route diagram.
Claim 5
Dependent Claim
36 words
The circuit designing apparatus of an interactive type according to claim 3, wherein said display control unit causes said display unit to simultaneously display said schematic destination route diagrams and said graphs of plural wiring paths.
Claim 6
Dependent Claim
38 words
The circuit designing apparatus of an interactive type according to claim 3, further comprising: a printing unit for printing out said schematic destination route diagram and said graph displayed on said display unit by said display control unit.
Claim 7
Dependent Claim
43 words
The circuit designing apparatus of an interactive type according to claim 3 further comprising: an external file writing unit for writing said schematic destination route diagram and said graph displayed on said display unit by said display control unit into an external file.
Claim 8
Dependent Claim
42 words
The circuit designing apparatus of an interactive type according to claim 3, wherein said display control unit causes said display unit to display an actual, circuit diagram corresponding to said schematic destination route diagram according to an instruction through said input unit.
Claim 9
Dependent Claim
122 words
The circuit designing apparatus of an interactive type according to claim 3, wherein said display control unit causes said display unit to display all wiring paths each from a trace start pin to each of trace destination pins traced by said path trace unit with a pin name of a pin of said each logic component traced by said path trace unit in the form of a tree structure, and when an arbitrary pin is selected in a display of the wiring paths in the form of a tree structure displayed on said display unit according to an instruction through said input, said display control unit causes said display unit to display detailed information including a delay value of said selected pin.
Claim 10
Dependent Claim
85 words
The circuit designing apparatus an interactive type according to claim 2, wherein said display control unit causes said display unit to display a result of a trace by said path trace unit and a result of a delay computation by said speed analyzing unit as a list of trace destination pins, and said display control unit has a sorting function for sorting a display condition of said list according to pin names of the trace destination pins or delay values of the trace destination pins.
Claim 11
Dependent Claim
71 words
The circuit designing apparatus of an interactive type according to claim 9, wherein said display control unit causes said display unit to hierarchically display said list, and if information of an upper hierarchy on said display unit is selected according to an instruction through said input unit, said display control unit causes said display unit to display information of a lower hierarchy corresponding to the information of said upper hierarchy selected.
Claim 12
Dependent Claim
42 words
The circuit designing apparatus of an interactive type according to claim 9 further comprising: an external file writing unit for writing a list of said trace destination pins displayed on said display unit by said display control unit into an external file.
Claim 13
Dependent Claim
287 words
The circuit designing apparatus of an interactive type according to claim 8 further comprising: a timing check unit for checking a timing of supply of a clock signal to each of said logic components, wherein if a clock system supplying the clock signal to each of said logic components is already designed, a clock pin of said clock system that should be checked by said timing check unit and an initial value and a phase of the clock signal inputted from said clock pin are designated through said input unit, said path trace unit traces a wiring path from said clock pin to search all logic components connected to said clock pin, said speed analyzing unit simultaneously conducts a delay computation of a wiring path between said clock pin and each of all the logic components connected to said clock pin to store a result of the delay computation as a clock path delay value, flag representing that a logic component searched by said path trace unit is an object of a check by said timing check unit is set to each pin of the logic component, said path trace unit conducts a tracing process of the wiring path from a clock input pin of each of all the logic components searched, and activates said timing check unit when tracing a pin set by said flag in the tracing process, and said timing check unit conducts a clock timing check on a logic component to which said pin belongs on the basis of the delay value up to said pin calculated by said speed analyzing unit, said clock path delay value, and an initial value and a phase of said clock signal designated through said input unit.
Claim 14
Dependent Claim
72 words
The circuit designing apparatus of an interactive type according to claim 12 further comprising: a delay value setting unit for setting a predetermined delay value to an arbitrary pin traced by said path trace unit according to an instruction through said input unit, wherein said speed analyzing unit adds said predetermined delay value set by said delay value setting unit as a delay value of a wiring path passing through said pin.
Claim 15
Dependent Claim
115 words
The circuit designing apparatus of an interactive type according to claim 2 further comprising: a trace control unit for controlling to switch an operation of said path trace unit such that if only a trace start pin is designated according to an instruction through said input unit, a forward trace from said trace start pin is executed, if only a trace destination pin is designated according to an instruction through said input unit, a backward trace from said trace destination pin is executed, and if two points of a trace start pin and a trace destination pin are designated according to an instruction through said input unit, a trace between the two points is executed.
Claim 16
Dependent Claim
57 words
The circuit designing apparatus of an interactive type according to claim 14, wherein when said trace control unit causes said path trace unit to conduct a backward trace, a mode as to whether said speed analyzing unit conducts a delay computation or not after the backward trace is set according to an instruction through said input unit.
Claim 17
Dependent Claim
72 words
The circuit designing apparatus of an interactive type according to claim 2 further comprising: a delay value setting unit for setting a predetermined delay value to an arbitrary pin traced by said path trace unit according to an instruction through said input unit, wherein said speed analyzing unit adds said predetermined delay value set by said delay value setting unit as a delay value of a wiring path passing through said pin.
Claim 18
Dependent Claim
196 words
The circuit designing apparatus of an interactive type according to claim 2 further comprising: a timing check unit for checking a timing of supply of a clock signal to each of said logic components; and a search unit for searching all logic components each having a clock input pin connected to a clock system among logic components forming a circuit that is an object of a design if said clock system supplying the clock signal to each of said logic components is not yet designed, wherein a flag representing that a logic component searched by said search unit is an object of a check by said timing check unit is set to each pin of the logic component, said path trace unit conducts a tracing process on a wiring path from a clock input pin of each of all the logic components searched, and activates said timing check unit when tracing a pin set by said flag in the tracing process, said timing check unit conducts a clock timing check on a logic component to which said pin belongs on the basis of a delay value up to said pin calculated by said speed analyzing unit.
Claim 19
Dependent Claim
39 words
The circuit designing apparatus of an interactive type according to claim 2 further comprising: a counter for counting the number of traces conducted on said pin by said path trace unit for each of pins of said logic components.
Claim 20
Dependent Claim
52 words
The circuit designing apparatus of an interactive type according to claim 18, wherein said display control unit causes said display unit to display information in terms of a magnitude of frequency of passage of signals through each pin on the basis of a count value at each pin counted by said counter.
Claim 21
Dependent Claim
86 words
The circuit designing apparatus of an interactive type according to claim 2 further comprising: a region setting unit for setting an executing region in which a tracing process on a wiring path executed by said path trace unit and a delay computing process executed by said speed analyzing unit are conducted according to an instruction through said input unit, wherein said display control unit causes said display unit to display only a result of said process in said executing region set by said region setting unit.
Claim 22
Dependent Claim
273 words
A circuit designing apparatus of an interactive type having a display unit for displaying circuit design steps and an input unit for inputting responsive information to displayed data on said display unit and information necessary for designing a circuit in order to conduct said circuit design in an interactive form comprising: a logic design unit for conducting a logic design of said circuit to be designed; a layout design unit for conducting a placement in mounting of each logic component forming said circuit to be designed on the basis of a result of the logic design by said logic design unit, then wiring between said logic components; a speed analyzing unit for conducting a delay computation for each wiring path on said circuit to be designed; and a display control unit for causing said display unit to display the result of the logic design by said logic design unit, a result of placement/wiring by said layout design unit and a result of the delay computation by said speed analyzing unit, wherein said logic design unit, said layout design unit and said speed analyzing unit being connected so as to be able to associate with each other on occasion, wherein before said layout design unit conducts placement in mounting of said logic components after the logic design by said logic design unit, said speed analyzing unit predicts and calculates a delay value of a wiring path of said circuit to be designed based on the amount of capacitance in said circuit to be designed while estimating a delay value between said logic components on the basis of an empirical delay value set in advance.
Claim 23
Dependent Claim
273 words
A circuit designing apparatus of an interactive type having a display unit for displaying circuit design steps and an input unit for inputting responsive information to displayed data on said display unit and information necessary for designing a circuit in order to conduct said circuit design in an interactive form comprising: a logic design unit for conducting a logic design of said circuit to be designed; a layout design unit for conducting a placement in mounting of each logic component forming said circuit to be designed on the basis of a result of the logic design by said logic design unit, then wiring between said logic components; a speed analyzing unit for conducting a delay computation for each wiring path on said circuit to be designed; and a display control unit for causing said display unit to display the result of the logic design by said logic design unit, a result of placement/wiring by said layout design unit and a result of the delay computation by said speed analyzing unit, wherein said logic design unit, said layout design unit and said speed analyzing unit being connected so as to be able to associate with each other on occasion, wherein before said layout design unit conducts placement in mounting of said logic components after the logic design by said logic design unit, said speed analyzing unit predicts and calculates a delay value of a wiring path of said circuit to be designed based on the amount of capacitance in said circuit to be designed while estimating a delay value between said logic components on the basis of an empirical delay value set in advance.
Claim 24
Dependent Claim
64 words
The circuit designing apparatus of an interactive type according to claim 21, wherein before said layout design unit wires said logic components after a placement in mounting of said logic components, said speed analyzing unit estimates and calculates a delay value of a wiring path of said circuit to be designed on the basis of the shortest route between pins that should be connected.
Claim 25
Dependent Claim
46 words
The circuit designing apparatus of an interactive type according to claim 22, wherein said speed analyzing unit calculates a delay value of a wiring path of said circuit to be designed on the basis of a result of an actual wiring by said layout design unit.
Claim 26
Dependent Claim
49 words
The circuit designing apparatus of an interactive type according to claim 23, wherein when said speed analyzing unit conducts a delay computation, a delay value of each of said logic components is set and altered according to a slew rate of a signal waveform inputted to said logic component.
Claim 27
Dependent Claim
99 words
The circuit designing apparatus of an interactive type according to claim 24 further comprising: a path trace unit for tracing a wiring path connected to a predetermined pin designated according to an instruction through said input unit from said pin, wherein said path trace unit conducts a tracing process of the wiring path, and said speed analyzing unit simultaneously conducts a delay computation of said wiring path while calculating the slew rate of a signal waveform varying along said wiring path to set a delay value of a logic component on said wiring path according to said slew rate.
Claim 28
Dependent Claim
86 words
The circuit designing apparatus of an interactive type according to claim 25, wherein said display control unit causes said display unit to display a result of a trace by said path trace unit as a schematic destination route diagram, and causes said display unit to display a result of a delay computation by said speed analyzing unit corresponding to the result of said trace as a graph representing a delay value and an accumulated delay value corresponding to a position in said schematic destination route diagram.
Claim 29
Dependent Claim
38 words
The circuit designing apparatus of an interactive type according to claim 26 further comprising: a printing unit for printing out said schematic destination route diagram and said graph displayed on said display unit by said display control unit.
Claim 30
Dependent Claim
36 words
The circuit designing apparatus of an interactive type according to claim 26, wherein said display control unit causes said display unit to simultaneously display said schematic destination route diagrams and said graphs of plural wiring paths.
Claim 31
Dependent Claim
43 words
The circuit designing apparatus of an interactive type according to claim 26 further comprising: an external file writing unit for writing said schematic destination route diagram and said graph displayed on said display unit by said display control unit into an external file.
Claim 32
Dependent Claim
42 words
The circuit designing apparatus of an interactive type according to claim 26, wherein said display control unit causes said display unit to display an actual circuit diagram corresponding to said schematic destination route diagram according to an instruction through said input unit.
Claim 33
Dependent Claim
117 words
The circuit designing apparatus of an interactive type according to claim 26, wherein said display control unit causes said display unit to display all wiring paths each from a trace start pin to each of trace destination pins traced by said path trace unit with a pin name of a pin of said each logic component in the form of a tree structure, and when an arbitrary pin is selected in a display of the wiring paths in the form of a tree structure displayed on said display unit according to an instruction through said input unit, said display control unit causes said display unit to display detailed information including a delay value of said selected pin.
Claim 34
Dependent Claim
287 words
The circuit designing apparatus of an interactive type according to claim 15 further comprising: a timing check unit for checking a timing of supply of a clock signal to each of said logic components, wherein if a clock system supplying the clock signal to each of said logic components is already designed, a clock pin of said clock system that should be checked by said timing check unit and an initial value and a phase of the clock signal inputted from said clock pin are designated through said input unit, said path trace unit traces a wiring path from said clock pin to search all logic components connected to said clock pin, said speed analyzing unit simultaneously conducts a delay computation of a wiring path between said clock pin and each of all the logic components connected to said clock pin to store a result of the delay computation as a clock path delay value, a flag representing that a logic component searched by said path trace unit is an object of a check by said timing check unit is set to each pin of the logic component, said path trace unit conducts a tracing process of the wiring path from a clock input pin of each of all the logic components searched, and activates said timing check unit when tracing a pin set by said flag in the tracing process, said timing check unit conducts a clock timing check on a logic component to which said pin belongs on the basis of the delay value up to said pin calculated by said speed analyzing unit, said clock path delay value, and an initial value and a phase of said clock signal designated through said input unit.
Claim 35
Dependent Claim
72 words
The circuit designing apparatus of an interactive type according to claim 32 further comprising: a delay value setting unit for setting a predetermined delay value to an arbitrary pin traced by said path trace unit according to an instruction through said input unit, wherein said speed analyzing unit adds said predetermined delay value set by said delay value setting unit as a delay value of a wiring path passing through said pin.
Claim 36
Dependent Claim
38 words
The circuit designing apparatus of an interactive type according to claim 25 further comprising: a counter for counting the number of traces conducted on said pin by said path trace unit for each pin of said logic components.
Claim 37
Dependent Claim
52 words
The circuit designing apparatus of an interactive type according to claim 34, wherein said display control unit causes said display unit to display information in terms of a magnitude of frequency of passage of signals through each pin on the basis of a count value at each pin counted by said counter.
Claim 38
Dependent Claim
86 words
The circuit designing apparatus of an interactive type according to claim 25, wherein said display control unit causes said display unit to display a result of a trace by said path trace unit and a result of a delay computation by said speed analyzing unit as a list of trace destination pins, and said display control unit has a sorting function for sorting a display condition of said list according to pin names of the trace destination pins or delay values of the trace destination pins.
Claim 39
Dependent Claim
71 words
The circuit designing apparatus of an interactive type according to claim 36, wherein said display control unit causes said display unit to hierarchically display said list, and if information of an upper hierarchy on said display unit is selected according to an instruction through said input unit, said display control unit causes said display unit to display information of a lower hierarchy corresponding to the information of said upper hierarchy selected.
Claim 40
Dependent Claim
42 words
The circuit designing apparatus of an interactive type according to claim 36 further comprising: an external file writing unit for writing a list of said trace destination pins displayed on said display unit by said display control unit into an external file.
Claim 41
Dependent Claim
86 words
The circuit designing apparatus of an interactive type according to claim 25 further comprising: a region setting unit for setting an executing region in which a tracing process on a wiring path executed by said path trace unit and a delay computing process executed by said speed analyzing unit are conducted according to an instruction through said input unit, wherein said display control unit causes said display unit to display only a result of said process in said executing region set by said region setting unit.
Claim 42
Dependent Claim
72 words
The circuit designing apparatus of an interactive type according to claim 25 further comprising: a delay value setting unit for setting a predetermined delay value to an arbitrary pin traced by said path trace unit according to an instruction through said input unit, wherein said speed analyzing unit adds said predetermined delay value set by said delay value setting unit as a delay value of a wiring path passing through said pin.
Claim 43
Dependent Claim
197 words
The circuit designing apparatus of an interactive type according to claim 25 further comprising: a timing check unit for checking a timing of supply of a clock signal to each of said logic components; and a search unit for searching all logic components each having a clock input pin connected to a clock system among logic components forming a circuit that is an object of a design if said clock system supplying the clock signal to each of said logic components is not yet designed, wherein a flag representing that a logic component searched by said search unit is an object of a check by said timing check unit is set to each pin of the logic component, said path trace unit conducts a tracing process on a wiring path from a clock input pin of each of all the logic components searched, and activates said timing check unit when tracing a pin set by said flag in the tracing process, and said timing check unit conducts a clock timing check on a logic component to which said pin belongs on the basis of a delay value up to said pin calculated by said speed analyzing unit.
Claim 44
Dependent Claim
115 words
The circuit designing apparatus of an interactive type according to claim 25 further comprising: a trace control unit for controlling to switch an operation of said path trace unit such that if only a trace start pin is designated according to an instruction through said input unit, a forward trace from said trace start pin is executed, if only a trace destination pin is designated according to an instruction through said input unit, a backward trace from said trace destination pin is executed, and if two points of a trace start pin and a trace destination pin are designated according to an instruction through said input unit, a trace between the two points is executed.
Claim 45
Dependent Claim
57 words
The circuit designing apparatus of an interactive type according to claim 42, wherein when said trace control unit causes said path trace unit to conduct a backward trace, a mode as to whether said speed analyzing unit conducts a delay computation or not after the backward trace is set according to an instruction through said input unit.
Claim 46
Dependent Claim
49 words
The circuit designing apparatus of an interactive type according to claim 22, wherein when said speed analyzing unit conducts a delay computation, a delay value of each of said logic components is set and altered according to a slew rate of a signal waveform inputted to said logic component.
Claim 47
Dependent Claim
99 words
The circuit designing apparatus of an interactive type according to claim 44 further comprising: a path trace unit for tracing a wiring path connected to a predetermined pin designated according to an instruction through said input unit from said pin, wherein said path trace unit conducts a tracing process of the wiring path, and said speed analyzing unit simultaneously conducts a delay computation of said wiring path while calculating the slew rate of a signal waveform varying along said wiring path to set a delay value of a logic component on said wiring path according to said slew rate.
Claim 48
Dependent Claim
288 words
The circuit designing apparatus of an interactive type according to claim 45, further comprising: a timing check unit for checking a timing of supply of a clock signal to each of said logic components, wherein if a clock system supplying the clock signal to each of said logic components is already designed, a clock pin of said clock system that should be checked by said timing check unit and an initial value and a phase of the clock signal inputted from said clock pin are designated through said input unit, said path trace unit traces a wiring path from said clock pin to search all logic components connected to said clock pin, said speed analyzing unit simultaneously conducts a delay computation of a wiring path between said clock pin and each of all the logic components connected to said clock pin to store a result of the delay computation as a clock path delay value, a flag representing that a logic component searched by said path trace unit is an object of a check by said timing check unit is set to each pin of the logic component, said path trace unit conducts a tracing process of the wiring path from a clock input pin of each of all the logic components searched, and activates said timing check unit when tracing a pin set by said flag in the tracing process, and said timing check unit conducts a clock timing check on a logic component to which said pin belongs on the basis of the delay value up to said pin calculated by said speed analyzing unit, said clock path delay value, and an initial value and a phase of said clock signal designated through said input unit.
Claim 49
Dependent Claim
72 words
The circuit designing apparatus of an interactive type according to claim 46 further comprising: a delay value setting unit for setting a predetermined delay value to an arbitrary pin traced by said path trade unit according to an instruction through said input unit, wherein said speed analyzing unit adds said predetermined delay value set by said delay value setting unit as a delay value of a wiring path passing through said pin.
Claim 50
Dependent Claim
72 words
The circuit designing apparatus of a interactive type according to claim 45 further comprising: a delay value setting unit for setting a predetermined delay value to an arbitrary pin traced by said path trace unit according to an instruction through said input unit, wherein said speed analyzing unit adds said predetermined delay value set by said delay value setting unit as a delay value of a wiring path passing through said pin.
Claim 51
Dependent Claim
197 words
The circuit designing apparatus of an interactive type according to claim 45 further comprising: a timing check unit for checking a timing of supply of a clock signal to each of said logic components; and a search unit for searching all logic components each having a clock input pin connected to a clock system among logic components forming a circuit that is an object of a design if said clock system supplying the clock signal to each of said logic components is not yet designed, wherein a flag representing that a logic component searched by said search unit is an object of a check by said timing check unit is set to each pin of the logic component, said path trace unit conducts a tracing process on a wiring path from a clock input pin of each of all the logic components searched, and activates said timing check unit when tracing a pin set by said flag in the tracing process and said timing check unit conducts a clock timing check on a logic component to which said pin belongs on the basis of a delay value up to said pin calculated by said speed analyzing unit.
Claim 52
Dependent Claim
86 words
The circuit designing apparatus of an interactive type according to claim 45, wherein said display control unit causes said display unit to display a result of a trace by said path trace unit and a result of a delay computation by said speed analyzing unit as a list of trace destination pins, and said display control unit has a sorting function for sorting a display condition of said list according to pin names of the trace destination pins or delay values of the trace destination pins.
Claim 53
Dependent Claim
71 words
The circuit designing apparatus of an interactive type according to claim 50, wherein said display control unit causes said display unit to hierarchically display said list, and if information of an upper hierarchy on said display unit is selected according to an instruction through said input unit, said display control unit causes said display unit to display information of a lower hierarchy corresponding to the information of said upper hierarchy selected.
Claim 54
Dependent Claim
42 words
The circuit designing apparatus of an interactive type according to claim 50 further comprising: an external file writing unit for writing a list of said trace destination pins displayed on said display unit by said display control unit into an external file.
Claim 55
Dependent Claim
38 words
The circuit designing apparatus of an interactive type according to claim 45 further comprising: a counter for counting the number of traces conducted on said pin by said path trace unit for each pin of said logic components.
Claim 56
Dependent Claim
52 words
The circuit designing apparatus of an interactive type according to claim 53, wherein said display control unit causes said display unit to display information in terms of a magnitude of frequency of passage of signals through each pin on the basis of a count value at each pin counted by said counter.
Claim 57
Dependent Claim
86 words
The circuit designing apparatus of an interactive type according to claim 45 further comprising: a region setting unit for setting an executing region in which a tracing process on a wiring path executed by said path trace unit and a delay computing process executed by said speed analyzing unit are conducted according to an instruction through said input unit, wherein said display control unit causes said display unit to display only a result of said process in said executing region set by said region setting unit.
Claim 58
Dependent Claim
115 words
The circuit designing apparatus of an interactive type according to claim 45 further comprising: a trace control unit for controlling to switch an operation of said path trace unit such that if only a trace start pin is designated according to an instruction through said input unit, a forward trace from said trace start pin is executed, if only a trace destination pin is designated according to an instruction through said input unit, a backward trace from said trace destination pin is executed, and if two points of a trace start pin and a trace destination pin are designated according to an instruction through said input unit, a trace between the two points is executed.
Claim 59
Dependent Claim
57 words
The circuit designing apparatus of an interactive type according to claim 56, wherein when said trace control unit causes said path trace unit to conduct a backward trace, a mode as to whether said speed analyzing unit conducts a delay computation or not after the backward trace is set according to an instruction through said input unit.
Claim 60
Dependent Claim
86 words
The circuit designing apparatus of an interactive type according to claim 45, wherein said display control unit causes said display unit to display a result of a trace by said path trace unit as a schematic destination route diagram, and causes said display unit to display a result of a delay computation by said speed analyzing unit corresponding to the result of said trace as a graph representing a delay value and an accumulated delay value corresponding to a position in said schematic destination route diagram.
Claim 61
Dependent Claim
36 words
The circuit designing apparatus of an interactive type according to claim 58, wherein said display control unit causes said display unit to simultaneously display said schematic destination route diagrams and said graphs of plural wiring paths.
Claim 62
Dependent Claim
38 words
The circuit designing apparatus of an interactive type according to claim 58, further comprising: a printing unit for printing out said schematic destination route diagram and said graph displayed on said display unit by said display control unit.
Claim 63
Dependent Claim
43 words
The circuit designing apparatus of an interactive type according to claim 58 further comprising: an external file writing unit for writing said schematic destination route diagram and said graph displayed on said display unit by said display control unit into an external file.
Claim 64
Dependent Claim
42 words
The circuit designing apparatus of an interactive type according to claim 58, wherein said display control unit causes said display unit to display an actual circuit diagram corresponding to said schematic destination route diagram according to an instruction through said input unit.
Claim 65
Dependent Claim
117 words
The circuit designing apparatus of an interactive type according to claim 58, wherein said display control unit causes said display unit to display all wiring paths each from a trace start pin to each of trace destination pins traced by said path trace unit with a pin name of a pin of said each logic component in the form of a tree structure, and when an arbitrary pin is selected in a display of the wiring paths in the form of a tree structure displayed on said display unit according to an instruction through said input unit, said display control unit causes said display unit to display detailed information including a delay value of said selected pin.
Claim 66
Dependent Claim
49 words
The circuit designing apparatus of an interactive type according to claim 21, wherein when said speed analyzing unit conducts a delay computation, a delay value of each of said logic components is set and altered according to a slew rate of a signal waveform inputted to said logic component.
Claim 67
Dependent Claim
99 words
The circuit designing apparatus of an interactive type according to claim 64 further comprising: a path trace unit for tracing a wiring path connected to a predetermined pin designated according to an instruction through said input unit from said pin, wherein said path trace unit conducts a tracing process of the wiring path, and said speed analyzing unit simultaneously conducts a delay computation of said wiring path while calculating the slew rate of a signal waveform varying along said wiring path to set a delay value of a logic component on said wiring path according to said slew rate.
Claim 68
Dependent Claim
287 words
The circuit designing apparatus of an interactive type according to claim 65 further comprising: a timing check unit for checking a timing of supply of a clock signal to each of said logic components, wherein if a clock system supplying the clock signal to each of said logic components is already designed, a clock pin of said clock system that should be checked by said timing check unit and an initial value and a phase of the clock signal inputted from said clock pin are designated through said input unit, said path trace unit traces a wiring path from said clock pin to search all logic components connected to said clock pin, said speed analyzing unit simultaneously conducts a delay computation of a wiring path between said clock pin and each of all the logic components connected to said clock pin to store a result of the delay computation as a clock path delay value, a flag representing that a logic component searched by said path trace unit is an object of a check by said timing check unit is set to each of the logic component, said path trace unit conducts a tracing process of the wiring path from a clock input pin of each of all the logic components searched, and activates said timing check unit when tracing a pin set by said flag in the tracing process, and said timing check unit conducts a clock timing check on a logic component to which said pin belongs on the basis of the delay value up to said pin calculated by said speed analyzing unit, said clock path delay value, and an initial value and a phase of said clock signal designated through said input unit.
Claim 69
Dependent Claim
72 words
The circuit designing apparatus of an interactive type according to claim 66 further comprising: a delay value setting unit for setting a predetermined delay value to an arbitrary pin traced by said path trace unit according to an instruction through said input unit, wherein said speed analyzing unit adds said predetermined delay value set by said delay value setting unit as a delay value of a wiring path passing through said pin.
Claim 70
Dependent Claim
72 words
The circuit designing apparatus of an interactive type according to claim 65 further comprising: a delay value setting unit for setting a predetermined delay value to an arbitrary pin traced by said path trace unit according to an instruction through said input unit, wherein said speed analyzing unit adds said predetermined delay value set by said delay value setting unit as a delay value of a wiring path passing through said pin.
Claim 71
Dependent Claim
197 words
The circuit designing apparatus of an interactive type according to claim 65 further comprising: a timing check unit for checking a timing of supply of a clock signal to each of said logic components; and a search unit for searching all logic components each having a clock input pin connected to a clock system among logic components forming a circuit that is an object of a design if said clock system supplying the clock signal to each of said logic components is not yet designed, wherein a flag representing that a logic component searched by said search unit is an object of a check by said timing check unit is set to each pin of the logic component, said path trace unit conducts a tracing process on a wiring path from a clock input pin of each of all the logic components searched, and activates said timing check unit when tracing a pin set by said flag in the tracing process, and said timing check unit conducts a clock timing check on a logic component to which said pin belongs on the basis of a delay value up to said pin calculated by said speed analyzing unit.
Claim 72
Dependent Claim
38 words
The circuit designing apparatus of an interactive type according to claim 65 further comprising: a counter for counting the number of traces conducted on said pin by said path trace unit for each pin of said logic components.
Claim 73
Dependent Claim
52 words
The circuit designing apparatus of an interactive type according to claim 70, wherein said display control unit causes said display unit to display information in terms of a magnitude of frequency of passage of signals through each pin on the basis of a count value at each pin counted by said counter.
Claim 74
Dependent Claim
86 words
The circuit designing apparatus of an interactive type according to claim 65 further comprising: a region setting unit for setting an executing region in which a tracing process on a wiring path executed by said path trace unit and a delay computing process executed by said speed analyzing unit are conducted according to an instruction through said input unit, wherein said display control unit causes said display unit to display only a result of said process in said executing region set by said region setting unit.
Claim 75
Dependent Claim
115 words
The circuit designing apparatus of an interactive type according to claim 65 further comprising: a trace control unit for controlling to switch an operation of said path trace unit such that if only a trace start pin is designated according to an instruction through said input unit, a forward trace from said trace start pin is executed, if only a trace destination pin is designated according to an instruction through said input unit, a backward trace from said trace destination pin is executed, and if two points of a trace start pin and a trace destination pin are designated according to an instruction through said input unit, a trace between the two points is executed.
Claim 76
Dependent Claim
57 words
The circuit designing apparatus of an interactive type according to claim 73, wherein when said trace control unit causes said path trace unit to conduct a backward trace, a mode as to whether said speed analyzing unit conducts a delay computation or not after the backward trace is set according to an instruction through said input unit.
Claim 77
Dependent Claim
86 words
The circuit designing apparatus of an interactive type according to claim 65, wherein said display control unit causes said display unit to display a result of a trace by said path trace unit and a result of a delay computation by said speed analyzing unit as a list of trace destination pins, and said display control unit has a sorting function for sorting a display condition of said list according to pin names of the trace destination pins or delay values of the trace destination pins.
Claim 78
Dependent Claim
71 words
The circuit designing apparatus of an interactive type according to claim 75, wherein said display control unit causes said display unit to hierarchically display said list, and if information of an upper hierarchy on said display unit is selected according to an instruction through said input unit, said display control unit causes said display unit to display information of a lower hierarchy corresponding to the information of said upper hierarchy selected.
Claim 79
Dependent Claim
42 words
The circuit designing apparatus of an interactive type according to claim 75 further comprising: an external file writing unit for writing a list of said trace destination pins displayed on said display unit by said display control unit into an external file.
Claim 80
Dependent Claim
86 words
The circuit designing apparatus of an interactive type according to claim 65, wherein said display control unit causes said display unit to display a result of a trace by said path trace unit as a schematic destination route diagram, and causes said display unit to display a result of a delay computation by said speed analyzing unit corresponding to the result of said trace as a graph representing a delay value and an accumulated delay value corresponding to a position in said schematic destination route diagram.
Claim 81
Dependent Claim
36 words
The circuit designing apparatus of an interactive type according to claim 78, wherein said display control unit causes said display unit to simultaneously display said schematic destination route diagrams and said graphs of plural wiring paths.
Claim 82
Dependent Claim
38 words
The circuit designing apparatus of an interactive type according to claim 78 further comprising: a printing unit for printing out said schematic destination route diagram and said graph displayed on said display unit by said display control unit.
Claim 83
Dependent Claim
116 words
The circuit designing apparatus of an interactive type according to claim 78, wherein said display control unit causes said display unit to display all wiring paths each from a trace start pin to each trace destination pins traced by said path trace unit with a pin name of a pin of said each logic component in the form of a tree structure, and when an arbitrary pin is selected in a display of the wiring paths in the form of a tree structure displayed on said display unit according to an instruction through said input unit, said display control unit causes said display unit to display detailed information including a delay value of said selected pin.
Claim 84
Dependent Claim
43 words
The circuit designing apparatus of an interactive type according to claim 78 further comprising: an external file writing unit for writing said schematic destination route diagram and said graph displayed on said display unit by said display control unit into an external file.
Claim 85
Dependent Claim
42 words
The circuit designing apparatus of an interactive type according to claim 78, wherein said display control unit causes said display unit to display an actual circuit diagram corresponding to said schematic destination route diagram according to an instruction through said input unit.
References Cited (Backward Citations)
US4855726A
Cited
US5155836A
Cited
US4947365A
Cited
US4970664A
Cited
US5111413A
Cited
US5051938A
Cited
US5077676A
Cited
US5555201A
Cited
US5623418A
Cited
US5541849A
Cited
US5544067A
Cited
US5553002A
Cited
US5222030A
Cited
US5572436A
Cited
US5220512A
Cited
US5333032A
Cited
US5381524A
Cited
US5381524B2
Cited
US5381524B1
Cited
US5572717A
Cited
US5507029A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-03-29 | 2002-09-28 | 2003-03-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-03-29 | 2006-09-28 | 2007-03-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-03-29 | 2010-09-28 | 2011-03-30 | $7700.00 | Window Closed / Lapsed |