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US5886564A
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Temperature compensation circuit for IC chip
Assignee: Advantest Corp
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Filing: 1994-11-29
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Granted: 1999-03-23
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Expires: 2014-11-29
Abstract
Abstract A temperature compensation circuit which includes a signal detecting circuit provided on a signal supply path which outputs logic signals to a target circuit. Also included are switch elements which turn current on/off to heater elements each time the signal detecting circuit detects that the logic signals are being applied to the target circuit. The power source of the invention therefore only needs to endure the same amount of current applied to the target circuit which leads to a reduction in power consumption.
Inventors
- 👤 Masatoshi Sato
- 👤 Noriyuki Masuda
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 17:16
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/14; H03K17/145; H03K19/00; H03K19/003; H03K19/00369; H03K2217/00; H03K2217/0036
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
59 words
A temperature compensation circuit for an IC chip, comprising: a signal detecting circuit for supplying a S logic signal to a target circuit; a heater formed of a semiconductor element; and a switch for switching electric current applied to said heater every time when said signal detecting circuit detects the supply of said logic signal to said target circuit.
Claim 2
Dependent Claim
59 words
A temperature compensation circuit for an IC chip, comprising: a signal detecting circuit for supplying a S logic signal to a target circuit; a heater formed of a semiconductor element; and a switch for switching electric current applied to said heater every time when said signal detecting circuit detects the supply of said logic signal to said target circuit.
Claim 3
Dependent Claim
20 words
A temperature compensation circuit as defined in claim 1, wherein said heater is comprised of a plurality of semiconductor transistors.
Claim 4
Dependent Claim
23 words
A temperature compensation circuit as defined in claim 1, wherein said signal detecting circuit includes a flip-flop circuit and an exclusive OR circuit.
Claim 5
Dependent Claim
25 words
A temperature compensation circuit as defined in claim 1, wherein a plurality of flip-flops are provided corresponding to a plurality of target circuits in series.
Claim 6
Dependent Claim
184 words
A temperature compensation circuit for an IC chip, comprising: a first circuit for transmission of a pulse signal to be used as a test signal for an electronic device; a second circuit having substantially the same circuit structure as that of the first circuit, said second being used as a heater and arranged in close proximity with said first circuit; a selector which is provided with two clock signals having different frequencies, said selector being controlled to select one of said clock signals; a logical delay circuit for producing a delay time which is a multiple of a period of one of said clock signals; a mask circuit for prohibiting the selected clock signal from passing therethrough for a certain period of time determined by said logical delay circuit, said mask circuit providing its output to said first circuit; a clock number adjusting circuit for adjusting the number of clock signals to be provided to the second circuit so that the sum of the number of pulses supplied to the first and second circuits is always equal to the clock signal of higher frequency.
Claim 7
Dependent Claim
184 words
A temperature compensation circuit for an IC chip, comprising: a first circuit for transmission of a pulse signal to be used as a test signal for an electronic device; a second circuit having substantially the same circuit structure as that of the first circuit, said second being used as a heater and arranged in close proximity with said first circuit; a selector which is provided with two clock signals having different frequencies, said selector being controlled to select one of said clock signals; a logical delay circuit for producing a delay time which is a multiple of a period of one of said clock signals; a mask circuit for prohibiting the selected clock signal from passing therethrough for a certain period of time determined by said logical delay circuit, said mask circuit providing its output to said first circuit; a clock number adjusting circuit for adjusting the number of clock signals to be provided to the second circuit so that the sum of the number of pulses supplied to the first and second circuits is always equal to the clock signal of higher frequency.
Claim 8
Dependent Claim
28 words
A temperature compensation circuit as defined in claim 5, wherein said clock number adjusting circuit includes a plurality of flip-flops, an exclusive OR gate and an AND gate.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-03-22 | 2002-09-21 | 2003-03-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-03-22 | 2006-09-21 | 2007-03-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-03-22 | 2010-09-21 | 2011-03-23 | $7700.00 | Window Closed / Lapsed |