US5886398A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Molded laminate package with integral mold gate
Assignee: LSI Corp
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Filing: 1997-09-26
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Granted: 1999-03-23
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Expires: 2017-09-26
Abstract
Abstract According to the present invention, a semiconductor package is provided. In one version of the invention, the semiconductor package includes a laminated substrate having a semiconductor die mounted on its upper surface, electrical connections between bond pads on the semiconductor die and conductive traces on the substrate, as well as electrical connections between the conductive traces and electrical contacts on the lower surface of the substrate. The semiconductor package also includes a molded covering on the upper surface of the substrate which covers the semiconductor die and the electrical connections. The molded covering has a mold body portion and a mold gate runner which extends from the mold body portion to an edge of the substrate. The mold gate runner is provided with a surface that is substantially even with the edge of the substrate and rises perpendicularly from the upper surface of the substrate.
Inventors
- 👤 Qwai H. Low
- 👤 Manickam Thavarajah
- 👤 Chok J. Chia
- 👤 Maniam Alagaratnam
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 06:34
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/10; H10W74/111; H10W74/114; H10W74/117; H10W74/01; H10W74/016; H10W72/00; H10W72/01; H10W72/0198; H10W72/851; H10W72/874; H10W72/884; H10W90/00; H10W90/701; H10W90/731; H10W90/734; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
128 words
A semiconductor package comprising: a laminated substrate having a semiconductor die mounted on an upper surface of the substrate; first electrical connections between bond pads on the semiconductor die and conductive traces on the upper surface of the substrate; second electrical connections between the conductive traces and electrical contacts on a lower surface of the substrate; a molded covering formed on the upper surface of the substrate which covers the semiconductor die and the first electrical connections, the molded covering having a mold body portion and a mold gate runner which extends from the mold body portion to an edge of the substrate, wherein the mold gate runner has a surface substantially even with the edge of the substrate and perpendicular to the upper surface of the substrate.
Claim 2
Dependent Claim
128 words
A semiconductor package comprising: a laminated substrate having a semiconductor die mounted on an upper surface of the substrate; first electrical connections between bond pads on the semiconductor die and conductive traces on the upper surface of the substrate; second electrical connections between the conductive traces and electrical contacts on a lower surface of the substrate; a molded covering formed on the upper surface of the substrate which covers the semiconductor die and the first electrical connections, the molded covering having a mold body portion and a mold gate runner which extends from the mold body portion to an edge of the substrate, wherein the mold gate runner has a surface substantially even with the edge of the substrate and perpendicular to the upper surface of the substrate.
Claim 3
Dependent Claim
28 words
A semiconductor package as in claim 1 wherein the mold gate runner is provided with a notch to facilitate separation of the semiconductor package from a mold runner.
Claim 4
Dependent Claim
27 words
A semiconductor package as in claim 2 wherein the notch is substantially V-shaped in a cross-section taken perpendicular to the edge of the package of the substrate.
Claim 5
Dependent Claim
23 words
A semiconductor package as in claim 2 wherein a bottom surface of the notch is substantially superjacent to the edge of the substrate.
Claim 6
Dependent Claim
30 words
A semiconductor package as in claim 4 wherein a second notch is provided in the mold gate runner between the edge of the package substrate and the mold body portion.
Claim 7
Dependent Claim
31 words
A semiconductor package as in claim 1 wherein the surface of the mold gate runner comprises a plurality of adjacent surfaces, each being substantially even with the edge of the substrate.
Claim 8
Dependent Claim
129 words
A semiconductor package comprising: a substrate having an upper surface, a lower surface and a perimeter; a plurality of conductive traces formed on the upper surface; a plurality of electrical contacts on the lower surface of the substrate for attachment to a printed wiring board; a plurality of conductive vias through the substrate electrically connecting the conductive traces on the upper surface to the electrical contacts on the lower surface; a semiconductor die mounted on the upper surface, the semiconductor die in electrical communication with the plurality of traces; a molded body formed on the upper surface of the substrate covering the semiconductor die and traces; and a mold gate runner on the upper surface of the substrate extending from the molded body to the perimeter of the substrate.
Claim 9
Dependent Claim
129 words
A semiconductor package comprising: a substrate having an upper surface, a lower surface and a perimeter; a plurality of conductive traces formed on the upper surface; a plurality of electrical contacts on the lower surface of the substrate for attachment to a printed wiring board; a plurality of conductive vias through the substrate electrically connecting the conductive traces on the upper surface to the electrical contacts on the lower surface; a semiconductor die mounted on the upper surface, the semiconductor die in electrical communication with the plurality of traces; a molded body formed on the upper surface of the substrate covering the semiconductor die and traces; and a mold gate runner on the upper surface of the substrate extending from the molded body to the perimeter of the substrate.
Claim 10
Dependent Claim
15 words
The package of claim 7 wherein the electrical contacts are a plurality of solder balls.
Claim 11
Dependent Claim
21 words
The package of claim 7 wherein the electrical communication between the semiconductor die and the plurality of traces is bond wires.
Claim 12
Dependent Claim
14 words
The package of claim 7 wherein the perimeter of the substrate is a square.
Claim 13
Dependent Claim
21 words
The package of claim 10 wherein the molded body has a number of sides parallel to the perimeter of the substrate.
Claim 14
Dependent Claim
15 words
The package of claim 11 wherein the sides of the molded body have a slope.
Claim 15
Dependent Claim
21 words
The package of claim 10 wherein the mold gate runner extends to an edge of the square perimeter of the substrate.
Claim 16
Dependent Claim
21 words
The package of claim 10 wherein the mold gate runner extends to a corner of the square perimeter of the substrate.
Claim 17
Dependent Claim
22 words
The package of claim 7 wherein the perimeter of the substrate is a square and one corner of the square is clipped.
Claim 18
Dependent Claim
22 words
The package of claim 15 wherein the mold gate runner extends to the clipped corner of the square perimeter of the substrate.
Claim 19
Dependent Claim
147 words
A semiconductor package comprising: a substrate having an upper surface, a lower surface and a rectangular perimeter with one clipped corner; a plurality of conductive traces formed on the upper surface; a plurality of electrical contacts on the lower surface of the substrate for attachment to a printed wiring board; a plurality of conductive vias through the substrate electrically connecting the conductive traces on the upper surface to the electrical contacts on the lower surface; a semiconductor die mounted on the upper surface, the semiconductor die in electrical communication with the plurality of traces; a molded body formed on the upper surface of the substrate covering the semiconductor die and traces, the molded body having sloped sides parallel to the edges of the substrate; and a mold gate runner on the upper surface of the substrate extending from the molded body to the perimeter of the substrate.
Claim 20
Dependent Claim
147 words
A semiconductor package comprising: a substrate having an upper surface, a lower surface and a rectangular perimeter with one clipped corner; a plurality of conductive traces formed on the upper surface; a plurality of electrical contacts on the lower surface of the substrate for attachment to a printed wiring board; a plurality of conductive vias through the substrate electrically connecting the conductive traces on the upper surface to the electrical contacts on the lower surface; a semiconductor die mounted on the upper surface, the semiconductor die in electrical communication with the plurality of traces; a molded body formed on the upper surface of the substrate covering the semiconductor die and traces, the molded body having sloped sides parallel to the edges of the substrate; and a mold gate runner on the upper surface of the substrate extending from the molded body to the perimeter of the substrate.
Claim 21
Dependent Claim
21 words
The package of claim 17 wherein the mold gate runner extends perpendicular to an edge of the perimeter of the substrate.
Claim 22
Dependent Claim
28 words
The package of claim 17 wherein the mold gate runner extends from a corner of the molded body to the clipped corner of the perimeter of the substrate.
Claim 23
Dependent Claim
22 words
The package of claim 17 wherein the intersection of the sloped sides of the molded body are clipped to form clipped corners.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-03-22 | 2002-09-21 | 2003-03-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-03-22 | 2006-09-21 | 2007-03-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-03-22 | 2010-09-21 | 2011-03-23 | $7700.00 | Window Closed / Lapsed |