Patent US5877478A successfully refreshed from Google Patents.
US5877478A
Expired / Lapsed
US
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Semiconductor device and method of manufacturing the same
Assignee: Toshiba Corp
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Filing: 1994-09-12
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Granted: 1999-03-02
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Expires: 2014-09-12
Abstract
Abstract A semiconductor substrate made of silicon or the like and having an active region is used as part of a package. Bumps are formed on a major surface of the semiconductor substrate. One end of each lead is connected to a corresponding bump, and the other end of the lead is located outside the major surface of the semiconductor substrate. An adhesive such as a thermoplastic resin is applied to the major surface of the semiconductor substrate. An upper substrate is located on the adhesive. The upper substrate is made of a metal plate, an insulating plate, or a semiconductor substrate. The upper substrate covers at least the active region of the semiconductor substrate, the bumps, and the lead portions on the semiconductor substrate.
Inventors
- 👤 Tomoyuki Ando
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 13:18
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/411; H10W70/415; H10W90/00; H10W90/811; H10W72/00; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W72/851; H10W72/874; H10W72/884; H10W74/00; H10W90/701; H10W90/721; H10W90/726; H10W90/731; H10W90/736; H10W90/751; H10W90/756
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
361 words
A semiconductor device comprising: a first semiconductor substrate having a major surface of rectangular shape with consecutive first, second, third, and fourth sides; an active region within said major surface of said first semiconductor substrate; a plurality of first bumps formed on said major surface of said first semiconductor substrate; a plurality of first leads formed on said major surface of said first semiconductor substrate and each having one end connected to only one of said first bumps and another end located outside said major surface of said first semiconductor substrate; a second semiconductor substrate having a major surface of rectangular shape with consecutive first, second, third, and fourth sides and located to oppose said major surface of said first semiconductor substrate; an active region within the major surface of said second semiconductor substrate; a plurality of second bumps formed on said major surface of said second semiconductor substrate; a plurality of second leads formed on said major surface of said second semiconductor substrate and each having one end connected to only one of said second bumps and the other end located outside said major surface of said second semiconductor substrate; and an electrically insulating adhesive for adhering said major surfaces of said first and second semiconductor substrates, said first and second leads being insulated from each other when the major surface of the first semiconductor substrate and the major surface of the second semiconductor substrate are adhered to each other; said first semiconductor substrate and said second semiconductor substrate overlapping each other so that, when said major surface of said first semiconductor substrate and said major surface of said second semiconductor substrate are adhered to each other by said electrically insulating adhesive, said first leads and said second leads are offset laterally relative to each other in a direction parallel to the first sides of the semiconductor substrates so as to avoid overlapping each other, said first side of said first semiconductor substrate is vertically aligned with said first side of said second semiconductor substrate, and the other end of each of said first and second leads is located on the first side of said first and second semiconductor substrates.
Claim 2
Dependent Claim
361 words
A semiconductor device comprising: a first semiconductor substrate having a major surface of rectangular shape with consecutive first, second, third, and fourth sides; an active region within said major surface of said first semiconductor substrate; a plurality of first bumps formed on said major surface of said first semiconductor substrate; a plurality of first leads formed on said major surface of said first semiconductor substrate and each having one end connected to only one of said first bumps and another end located outside said major surface of said first semiconductor substrate; a second semiconductor substrate having a major surface of rectangular shape with consecutive first, second, third, and fourth sides and located to oppose said major surface of said first semiconductor substrate; an active region within the major surface of said second semiconductor substrate; a plurality of second bumps formed on said major surface of said second semiconductor substrate; a plurality of second leads formed on said major surface of said second semiconductor substrate and each having one end connected to only one of said second bumps and the other end located outside said major surface of said second semiconductor substrate; and an electrically insulating adhesive for adhering said major surfaces of said first and second semiconductor substrates, said first and second leads being insulated from each other when the major surface of the first semiconductor substrate and the major surface of the second semiconductor substrate are adhered to each other; said first semiconductor substrate and said second semiconductor substrate overlapping each other so that, when said major surface of said first semiconductor substrate and said major surface of said second semiconductor substrate are adhered to each other by said electrically insulating adhesive, said first leads and said second leads are offset laterally relative to each other in a direction parallel to the first sides of the semiconductor substrates so as to avoid overlapping each other, said first side of said first semiconductor substrate is vertically aligned with said first side of said second semiconductor substrate, and the other end of each of said first and second leads is located on the first side of said first and second semiconductor substrates.
Claim 3
Dependent Claim
33 words
A device according to claim 1, further comprising a lead support film, formed between each of said first leads and said major surface of said first semiconductor substrate, for fixing said first leads.
Claim 4
Dependent Claim
33 words
A device according to claim 1, further comprising a lead support film, formed between each of said second leads and said major surface of said second semiconductor substrate, for fixing said second leads.
Claim 5
Dependent Claim
15 words
A device according to claim 2, wherein the lead support film is a polyimide film.
Claim 6
Dependent Claim
30 words
A device according to claim 1, wherein said first bumps are formed at a position spaced apart from one side of said first semiconductor substrate by at least 1.2 mm.
Claim 7
Dependent Claim
30 words
A device according to claim 1, wherein said second bumps are formed at a position spaced apart from one side of said second semiconductor substrate by at least 1.2 mm.
Claim 8
Dependent Claim
17 words
A device according to claim 1, wherein said first leads and second leads avoid overlapping each other.
Claim 9
Dependent Claim
16 words
A device according to claim 1, wherein said first leads and second leads overlap each other.
Claim 10
Dependent Claim
15 words
A device according to claim 3, wherein the lead support film is a polyimide film.
References Cited (Backward Citations)
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