US5872389A
Expired / Lapsed
US
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Semiconductor device having a fuse layer
Assignee: Mitsubishi Electric Corp
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Filing: 1996-06-28
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Granted: 1999-02-16
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Expires: 2016-06-28
Abstract
Abstract Burst pressure P of an insulating layer positioned immediately on a fuse layer is defined by using planar width W of fuse layer and thickness t of insulating layer. The value of the planar width W of fuse layer and the value of the thickness t of insulating layer are set such that the value of burst pressure P is at most about 1000 kg/cm2. The value of the thickness t and the value of the planar width W are set such that the value t/W is at least 0.45 and at most 0.91. Consequently, stable fuse blowing becomes possible while reducing manufacturing cost.
Inventors
- 👤 Yasumasa Nishimura
- 👤 Keiko Ito
- 👤 Hiroyuki Takeoka
- 👤 Masanao Maruta
- 👤 Masaharu Moriyasu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 16:48
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/493; H10W20/494
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
129 words
A semiconductor device having a fuse layer, comprising: a redundancy circuit; a fuse layer controlling said redundancy circuit; and an insulating layer having a thickness of at least about 1 μm formed to cover said fuse layer; wherein pressure P corresponding to burst pressure for said insulating layer is represented as ##EQU4## where t is thickness of said insulating layer, σ max is maximum bending stress of said insulating layer, W is planar width of said fuse layer and a is a coefficient changing in accordance with ratio between said planar width W and length of said fuse layer, and the planar width W of said fuse layer is determined with respect to the thickness t of said insulating layer to satisfy the relation defined by said equation (1).
Claim 2
Dependent Claim
129 words
A semiconductor device having a fuse layer, comprising: a redundancy circuit; a fuse layer controlling said redundancy circuit; and an insulating layer having a thickness of at least about 1 μm formed to cover said fuse layer; wherein pressure P corresponding to burst pressure for said insulating layer is represented as ##EQU4## where t is thickness of said insulating layer, σ max is maximum bending stress of said insulating layer, W is planar width of said fuse layer and a is a coefficient changing in accordance with ratio between said planar width W and length of said fuse layer, and the planar width W of said fuse layer is determined with respect to the thickness t of said insulating layer to satisfy the relation defined by said equation (1).
Claim 3
Dependent Claim
45 words
The semiconductor device having a fuse layer according to claim 1, wherein the thickness t of said insulating layer and the planar width W of said fuse layer are determined so that the value of said pressure P is at most 1000 kg/cm 2 .
Claim 4
Dependent Claim
81 words
The semiconductor device having a fuse layer according to claim 1, wherein said fuse layer includes a first portion having a first planar width, and a pair of second portions having a second planar width smaller than the first planar width provided on both sides of said first portion, and thickness of said insulating layer and said first planar width are determined such that burst pressure for said insulating layer on said first portion is at most 1000 kg/cm 2 .
Claim 5
Dependent Claim
96 words
A semiconductor device having a fuse layer, comprising: a redundancy circuit; a fuse layer controlling said redundancy circuit; and an insulating layer having a thickness of at least about 1 μm formed to cover said fuse layer; wherein value t/W is at least 0.45 and at most 0.91 where t is thickness of said insulating layer and W is planar width of said fuse layer, wherein a reflective film comprising spaced apart portions having a reflectance of at least about 50% when irradiated with a laser is selectively formed on the surface of said fuse layer.
Claim 6
Dependent Claim
96 words
A semiconductor device having a fuse layer, comprising: a redundancy circuit; a fuse layer controlling said redundancy circuit; and an insulating layer having a thickness of at least about 1 μm formed to cover said fuse layer; wherein value t/W is at least 0.45 and at most 0.91 where t is thickness of said insulating layer and W is planar width of said fuse layer, wherein a reflective film comprising spaced apart portions having a reflectance of at least about 50% when irradiated with a laser is selectively formed on the surface of said fuse layer.
Claim 7
Dependent Claim
58 words
A semiconductor device having a fuse layer, which semiconductor device comprises: a redundancy circuit; a fuse layer controlling said redundancy circuit; an insulating layer covering said fuse layer; and a reflective film comprising spaced apart portions having a reflectance of at least about 50% when irradiated with a laser selectively formed on the surface of said fuse layer.
Claim 8
Dependent Claim
58 words
A semiconductor device having a fuse layer, which semiconductor device comprises: a redundancy circuit; a fuse layer controlling said redundancy circuit; an insulating layer covering said fuse layer; and a reflective film comprising spaced apart portions having a reflectance of at least about 50% when irradiated with a laser selectively formed on the surface of said fuse layer.
Claim 9
Dependent Claim
20 words
The semiconductor device according to claim 5, wherein said insulating layer has a thickness of at least about 1 μm.
Claim 10
Dependent Claim
113 words
A semiconductor device having a fuse layer, comprising: a redundancy circuit; a fuse layer controlling said redundancy circuit; an insulating layer having a thickness of at least about 1 μm formed to cover said fuse layer; and a reflective film comprising spaced apart portions selectively formed on the surface of said fuse layer; whereby layers including said fuse layer and said reflective film have a high absorbing portion having relatively large laser absorption coefficient and a low absorbing portion having relatively small said absorption coefficient, wherein value t/w is at least 0.45 and at most 0.91 where t is thickness of said insulating layer and w is planar width of said fuse layer.
Claim 11
Dependent Claim
113 words
A semiconductor device having a fuse layer, comprising: a redundancy circuit; a fuse layer controlling said redundancy circuit; an insulating layer having a thickness of at least about 1 μm formed to cover said fuse layer; and a reflective film comprising spaced apart portions selectively formed on the surface of said fuse layer; whereby layers including said fuse layer and said reflective film have a high absorbing portion having relatively large laser absorption coefficient and a low absorbing portion having relatively small said absorption coefficient, wherein value t/w is at least 0.45 and at most 0.91 where t is thickness of said insulating layer and w is planar width of said fuse layer.
Claim 12
Dependent Claim
77 words
A semiconductor device having a fuse layer, which semiconductor device comprises: a redundancy circuit; a fuse layer controlling said redundancy circuit; an insulating layer covering said fuse layer; and a reflective film comprising spaced apart portions selectively formed on the surface of said fuse layer; whereby layers including said fuse layer and said reflective film have a high absorbing portion having relatively large laser absorption coefficient and a low absorbing portion having relatively small said absorption coefficient.
Claim 13
Dependent Claim
77 words
A semiconductor device having a fuse layer, which semiconductor device comprises: a redundancy circuit; a fuse layer controlling said redundancy circuit; an insulating layer covering said fuse layer; and a reflective film comprising spaced apart portions selectively formed on the surface of said fuse layer; whereby layers including said fuse layer and said reflective film have a high absorbing portion having relatively large laser absorption coefficient and a low absorbing portion having relatively small said absorption coefficient.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2002-02-15 | 2002-08-17 | 2003-02-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-02-15 | 2006-08-17 | 2007-02-16 | $3760.00 | Window Closed / Lapsed |
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