US5870309A
Expired / Lapsed
US
⏱️ 0.0 years remaining
HDL design entry with annotated timing
Assignee: Xilinx Inc
•
Filing: 1997-11-07
•
Granted: 1999-02-09
•
Expires: 2017-11-07
Abstract
Abstract The invention provides to the user a way of ascertaining the estimated delay through a circuit, by back-annotating the estimated delay through an instantiated macro into the HDL circuit description. Reported delays may include maximum delay, typical delay, and/or minimum delay on the critical path. Using well-known techniques for responding to textual keywords, a software procedure call is initiated whenever an HDL library macro instantiation is detected. The procedure looks up the associated timing data for the macro in a macro or device speeds file and back-annotates the data into the HDL circuit description, preferably as a comment directly following the macro instantiation. In another embodiment, the delay information is added when the file is saved. In yet another embodiment, the delay information is not added to the HDL file, but is written to a report file or displayed on the screen.
Inventors
- 👤 Gary R. Lawman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 20:02
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/32; G06F30/33; G06F30/3308; G06F30/3312; G06F30/34
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
84 words
A method for annotating timing information into an HDL description, the method comprising the steps of: a) receiving a command to instantiate a library macro, the instantiation comprising a keyword; b) calling a timing annotation procedure in response to the keyword; c) retrieving the macro timing information from a speeds file comprising delay information for the macro, the macro timing information comprising delays for the same path through the macro under different operating conditions; and d) adding the timing information to the HDL description.
Claim 2
Independent Claim
84 words
A method for annotating timing information into an HDL description, the method comprising the steps of: a) receiving a command to instantiate a library macro, the instantiation comprising a keyword; b) calling a timing annotation procedure in response to the keyword; c) retrieving the macro timing information from a speeds file comprising delay information for the macro, the macro timing information comprising delays for the same path through the macro under different operating conditions; and d) adding the timing information to the HDL description.
Claim 3
Dependent Claim
20 words
The method of claim 1, wherein the speeds file comprising delay information for the macro is a macro speeds file.
Claim 4
Dependent Claim
20 words
The method of claim 1, wherein the speeds file comprising delay information for the macro further comprises device delay data.
Claim 5
Dependent Claim
40 words
The method of claim 1, wherein in step d) when the timing information is added to the HDL description the names of the terminal nets of the critical paths are visually identified with the timing information to which they correspond.
Claim 6
Dependent Claim
30 words
The method of claim 4, wherein in step d) the names of the terminal nets of the critical path and the associated timing information are highlighted in the same color.
Claim 7
Dependent Claim
16 words
The method of claim 1, wherein the timing annotation procedure invokes synthesis of the library macro.
Claim 8
Dependent Claim
16 words
The method of claim 6, wherein the timing annotation procedure further places and routes the macro.
Claim 9
Dependent Claim
19 words
The method of claim 1, further comprising the step of: e) adding the timing information to a log file.
Claim 10
Dependent Claim
15 words
The method of claim 1, wherein the macro timing information comprises minimum and typical delays.
Claim 11
Independent Claim
87 words
A method for reporting macro timing information to a user editing an HDL description, the method comprising the steps of: a) receiving a command to instantiate a library macro, the instantiation comprising a keyword; b) calling a timing annotation procedure in response to the keyword; c) retrieving the macro timing information from a speeds file comprising delay information for the macro, the macro timing information comprising delays for the same path through the macro under different operating conditions; and d) displaying the timing information to the user.
Claim 12
Independent Claim
87 words
A method for reporting macro timing information to a user editing an HDL description, the method comprising the steps of: a) receiving a command to instantiate a library macro, the instantiation comprising a keyword; b) calling a timing annotation procedure in response to the keyword; c) retrieving the macro timing information from a speeds file comprising delay information for the macro, the macro timing information comprising delays for the same path through the macro under different operating conditions; and d) displaying the timing information to the user.
Claim 13
Dependent Claim
16 words
The method of claim 10, wherein the timing annotation procedure invokes synthesis of the library macro.
Claim 14
Dependent Claim
16 words
The method of claim 11, wherein the timing annotation procedure further places and routes the macro.
Claim 15
Dependent Claim
15 words
The method of claim 10, wherein the macro timing information comprises minimum and typical delays.
Claim 16
Independent Claim
80 words
A method for annotating timing information into an HDL description, the method comprising the steps of: a) receiving a command to instantiate a library macro, the instantiation comprising a keyword; b) calling a timing annotation procedure in response to the keyword; c) retrieving the macro timing information from a speeds file comprising delay information for the macro, the macro timing information comprising delays for the macro implemented in different FPGAs; and d) adding the timing information to the HDL description.
Claim 17
Independent Claim
80 words
A method for annotating timing information into an HDL description, the method comprising the steps of: a) receiving a command to instantiate a library macro, the instantiation comprising a keyword; b) calling a timing annotation procedure in response to the keyword; c) retrieving the macro timing information from a speeds file comprising delay information for the macro, the macro timing information comprising delays for the macro implemented in different FPGAs; and d) adding the timing information to the HDL description.
Claim 18
Dependent Claim
15 words
The method of claim 14, wherein the different FPGAs comprise FPGAs with different speed grades.
Claim 19
Independent Claim
83 words
A method for reporting macro timing information to a user editing an HDL description, the method comprising the steps of: a) receiving a command to instantiate a library macro, the instantiation comprising a keyword; b) calling a timing annotation procedure in response to the keyword; c) retrieving the macro timing information from a speeds file comprising delay information for the macro, the macro timing information comprising delays for the macro implemented in different FPGAS; and d) displaying the timing information to the user.
Claim 20
Independent Claim
83 words
A method for reporting macro timing information to a user editing an HDL description, the method comprising the steps of: a) receiving a command to instantiate a library macro, the instantiation comprising a keyword; b) calling a timing annotation procedure in response to the keyword; c) retrieving the macro timing information from a speeds file comprising delay information for the macro, the macro timing information comprising delays for the macro implemented in different FPGAS; and d) displaying the timing information to the user.
Claim 21
Dependent Claim
15 words
The method of claim 16, wherein the different FPGAs comprise FPGAs with different speed grades.
Claim 22
Independent Claim
103 words
A method for reporting macro delays while entering an HDL description, the method comprising the steps of: a) specifying a delay period such that any paths having a delay within the delay period of a critical path are reported, the critical path being the slowest path through the macro; b) receiving a command to instantiate a library macro, the instantiation comprising a keyword; c) calling a timing annotation procedure in response to the keyword; d) determining a critical path delay through the macro; e) reporting the critical path delay; f) determining one or more additional macro delays; and g) reporting the additional delays.
Claim 23
Independent Claim
103 words
A method for reporting macro delays while entering an HDL description, the method comprising the steps of: a) specifying a delay period such that any paths having a delay within the delay period of a critical path are reported, the critical path being the slowest path through the macro; b) receiving a command to instantiate a library macro, the instantiation comprising a keyword; c) calling a timing annotation procedure in response to the keyword; d) determining a critical path delay through the macro; e) reporting the critical path delay; f) determining one or more additional macro delays; and g) reporting the additional delays.
Claim 24
Independent Claim
102 words
A method for reporting macro delays while entering an HDL description, the method comprising the steps of: a) specifying a percentage such that any paths having a delay within the specified percentage of a critical path are reported, the critical path being the slowest path through the macro: b) receiving a command to instantiate a library macro, the instantiation comprising a keyword; c) calling a timing annotation procedure in response to the keyword; d) determining a critical path delay through the macro; e) reporting the critical path delay; f) determining one or more additional macro delays; and g) reporting the additional delays.
Claim 25
Independent Claim
102 words
A method for reporting macro delays while entering an HDL description, the method comprising the steps of: a) specifying a percentage such that any paths having a delay within the specified percentage of a critical path are reported, the critical path being the slowest path through the macro: b) receiving a command to instantiate a library macro, the instantiation comprising a keyword; c) calling a timing annotation procedure in response to the keyword; d) determining a critical path delay through the macro; e) reporting the critical path delay; f) determining one or more additional macro delays; and g) reporting the additional delays.
References Cited (Backward Citations)
US5610828A
Cited
US5150308A
Cited
US4855726A
Cited
US5155836A
Cited
US5197016A
Cited
US4970664A
Cited
US5721959A
Cited
US5095454A
Cited
US5544067A
Cited
US5623418A
Cited
US5555201A
Cited
US5220512A
Cited
US5576979A
Cited
US5446675A
Cited
US5461576A
Cited
US5594657A
Cited
US5754442A
Cited
US5673198A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-02-08 | 2002-08-10 | 2003-02-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-02-08 | 2006-08-10 | 2007-02-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-02-08 | 2010-08-10 | 2011-02-09 | $7700.00 | Window Closed / Lapsed |