US5867715A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Apparatus for programmably converting an operating voltage of a CPU and chipset
Assignee: Abit Computer Corp
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Filing: 1996-10-21
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Granted: 1999-02-02
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Expires: 2016-10-21
Abstract
Abstract An apparatus for programmably converting the operating voltage of a CPU & chipset by means of the firmware programmably setting the operating voltage, instead of by means of adjusting jumpers, is disclosed. The apparatus includes an address decoder unit, a programmable data memory, a DC to DC converter and a feedback resistance switching circuit. In operation, the computer inputs an address signal and a data signal required for changing the operating voltage to the address decoder unit. After being decoded, the data is written into the programmable data memory. Then the programmable data memory outputs a selection signal to change the internal resistance of the feedback resistance switching circuit, thereby to convert the output voltage of the DC to DC converter.
Inventors
- 👤 Wen-chung Lin
- 👤 Chih-ping Huang
- 👤 Hsan-yueh Fang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 17:52
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/56; G05F1/575
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
85 words
An apparatus for programmably converting an operating voltage of a CPU and chipset comprising: an impedance converting circuit connected between an output of a DC to DC converter and an input of a reference voltage, an input of the impedance converting circuit being connected with an address/data bus of the CPU and the chipset so that the bus inputs digital data representative of a certain address and the operating voltage, respectively, whereby the impedance converting circuit transforms the actual impedance thereof according to said data.
Claim 2
Independent Claim
85 words
An apparatus for programmably converting an operating voltage of a CPU and chipset comprising: an impedance converting circuit connected between an output of a DC to DC converter and an input of a reference voltage, an input of the impedance converting circuit being connected with an address/data bus of the CPU and the chipset so that the bus inputs digital data representative of a certain address and the operating voltage, respectively, whereby the impedance converting circuit transforms the actual impedance thereof according to said data.
Claim 3
Dependent Claim
92 words
The apparatus for programmably converting an operating voltage of a CPU and chipset as claimed in claim 1, wherein said impedance converting circuit further comprises: an address decoder unit for decoding and transferring the input digital data; a programmable data memory having a nonvolatile memory element for receiving a data signal input by the address decoder unit; and a feedback resistance switching circuit having an input connected with an output of the programmable data memory to change an internal equivalent resistance thereof according to an output state of the programmable data memory.
Claim 4
Dependent Claim
26 words
The apparatus for programmably converting an operating voltage of a CPU and chipset as claimed in claim 2, wherein said address decoder unit is a decoder.
Claim 5
Dependent Claim
38 words
The apparatus for programmably converting an operating voltage of a CPU and chipset as claimed in claim 3, wherein an output of said address decoder unit is provided for inputting said data signal to the programmable data memory.
Claim 6
Dependent Claim
30 words
The apparatus for programmably converting an operating voltage of a CPU and chipset as claimed in claim 2, wherein said programmable data memory includes a data register and a EEPROM.
Claim 7
Dependent Claim
31 words
The apparatus for programmably converting an operating voltage of a CPU and chipset as claimed in claim 2, wherein said programmable data memory includes a data register and a rechargeable battery.
Claim 8
Dependent Claim
55 words
The apparatus for programmably converting an operating voltage of a CPU and chipset as claimed in claim 2, wherein said feedback resistance switching circuit is composed of a plurality of transistors each connected in series with a resistor, the base electrode of each transistor acting as a signal input connected with the programmable data memory.
Claim 9
Independent Claim
148 words
An apparatus for programmably converting an operating voltage of a CPU and chipset comprising: an address decoder unit for decoding and transferring an input digital data, an input of the address decoder unit being connected with an address/data bus of the CPU and chipset so that the bus inputs the digital data representative of a certain address and the operating voltage, respectively; a programmable data memory having a nonvolatile memory element for receiving a data signal input by the address decoder unit; and a feedback resistance switching circuit connected between an output of a DC to DC converter and a reference voltage input of said DC to DC converter, said feedback resistance switching circuit having an input connected with an output of the programmable data memory to change an internal equivalent resistance of said feedback resistance switching circuit according to an output state of the programmable data memory.
Claim 10
Independent Claim
148 words
An apparatus for programmably converting an operating voltage of a CPU and chipset comprising: an address decoder unit for decoding and transferring an input digital data, an input of the address decoder unit being connected with an address/data bus of the CPU and chipset so that the bus inputs the digital data representative of a certain address and the operating voltage, respectively; a programmable data memory having a nonvolatile memory element for receiving a data signal input by the address decoder unit; and a feedback resistance switching circuit connected between an output of a DC to DC converter and a reference voltage input of said DC to DC converter, said feedback resistance switching circuit having an input connected with an output of the programmable data memory to change an internal equivalent resistance of said feedback resistance switching circuit according to an output state of the programmable data memory.
Claim 11
Dependent Claim
26 words
The apparatus for programmably converting an operating voltage of a CPU and chipset as claimed in claim 8, wherein said address decoder unit is a decoder.
Claim 12
Dependent Claim
38 words
The apparatus for programmably converting an operating voltage of a CPU and chipset as claimed in claim 8, wherein an output of said address decoder unit is provided for inputting said data signal to the programmable data memory.
Claim 13
Dependent Claim
30 words
The apparatus for programmably converting an operating voltage of a CPU and chipset as claimed in claim 8, wherein said programmable data memory includes a data register and an EEPROM.
Claim 14
Dependent Claim
30 words
The apparatus for programmably converting an operating voltage of a CPU and chipset as claimed in claim 8, wherein said programmable data memory includes a data register and a battery.
Claim 15
Dependent Claim
55 words
The apparatus for programmably converting an operating voltage of a CPU and chipset as claimed in claim 8, wherein said feedback resistance switching circuit is composed of a plurality of transistors each connected in series with a resistor, the base electrode of each transistor acting as a signal input connected with the programmable data memory.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-02-01 | 2002-08-03 | 2003-02-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-02-01 | 2006-08-03 | 2007-02-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-02-01 | 2010-08-03 | 2011-02-02 | $7700.00 | Window Closed / Lapsed |