Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
106 words
A method of operating a plurality of computing means comprising the steps of: (a) transforming a temporal logic formula into machine executable form; (b) loading the machine executable form for the temporal logic formula and data to be manipulated into said plurality of computing means; and (c) constructing a lattice to satisfy said temporal logic formula, the lattice having a plurality of nodes, each node representing a state value that is a value of a program variable at a given moment, the plurality of nodes being interconnected by directed arcs, each directed arc representing a change in state affected by a computation associated with that arc.
Claim 2
Independent Claim
106 words
A method of operating a plurality of computing means comprising the steps of: (a) transforming a temporal logic formula into machine executable form; (b) loading the machine executable form for the temporal logic formula and data to be manipulated into said plurality of computing means; and (c) constructing a lattice to satisfy said temporal logic formula, the lattice having a plurality of nodes, each node representing a state value that is a value of a program variable at a given moment, the plurality of nodes being interconnected by directed arcs, each directed arc representing a change in state affected by a computation associated with that arc.
Claim 3
Dependent Claim
27 words
The method of claim 1 wherein the state values are elements of strong types, including either constructed types or types defined using existential and bounded universal quantification.
Claim 4
Dependent Claim
19 words
The method of claim 1 wherein visibility of said program variables in a particular state is restricted to domains.
Claim 5
Dependent Claim
24 words
The method of claim 1 in which the state values may occupy computing means located in disparate geographical locations utilizing remote procedure call semantics.
Claim 6
Dependent Claim
18 words
The method of claim 1 and further including the step of proving correctness of the lattice construction automatically.
Claim 7
Dependent Claim
18 words
The method of claim 1 and further including the step of proving correctness of the lattice construction manually.
Claim 8
Dependent Claim
157 words
A computing system comprising: (a) a plurality of computing means operatively coupled by an interconnection network means for communicating with one another, the network means including means for performing global memory access routing, request combining and response decombining; (b) each of the computing means having an instruction set including combinable operations and write back capability; (c) the computing means further having a virtual memory address translation mechanism for enforcing access constraints for segments or pages of memory, said constraints being selected from the group consisting of: (i) memory shared, but no caching allowed, (ii) memory protected and temporary exclusive caching with processor indicated write back, (iii) discretionary memory access controls with exclusive demanded authorization user access rights, (iv) mandatory memory access controls in which a user may read values at an assigned security level or lower, write values at said assigned security level or higher, and only invoke combinable operations on values at the assigned security level.
Claim 9
Dependent Claim
157 words
A computing system comprising: (a) a plurality of computing means operatively coupled by an interconnection network means for communicating with one another, the network means including means for performing global memory access routing, request combining and response decombining; (b) each of the computing means having an instruction set including combinable operations and write back capability; (c) the computing means further having a virtual memory address translation mechanism for enforcing access constraints for segments or pages of memory, said constraints being selected from the group consisting of: (i) memory shared, but no caching allowed, (ii) memory protected and temporary exclusive caching with processor indicated write back, (iii) discretionary memory access controls with exclusive demanded authorization user access rights, (iv) mandatory memory access controls in which a user may read values at an assigned security level or lower, write values at said assigned security level or higher, and only invoke combinable operations on values at the assigned security level.