Patent US5866928A successfully refreshed from Google Patents.
US5866928A
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US
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Single digit line with cell contact interconnect
Assignee: Micron Technology Inc
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Filing: 1996-07-16
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Granted: 1999-02-02
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Expires: 2016-07-16
Abstract
Abstract An integrated memory circuit comprises a plurality of memory cells and access transistors; and a digit line comprising conductive tabs extending from at least one side of a conductive digit line. The use of one digit line allows for a reduction in internal noise and coupling between digit line pairs. The use of one digit line also allows for a reduction in array size.
Inventors
- 👤 David D. Siek
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 10:51
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/31; G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/4063; G11C11/407; G11C11/409; G11C11/4091; G11C11/4097; G11C7/00; G11C7/12; Y; Y10; Y10S; Y10S257/00; Y10S257/905; Y10S257/906; Y10S257/907
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
88 words
An integrated circuit memory device comprising: a plurality of memory cells fabricated in the integrated circuit memory device; a plurality of access transistors, each one of the plurality of access transistors having a source/drain connected to one of the plurality of memory cells and a gate connected to a word line; a conductive digit line fabricated in the integrated circuit memory device; and a plurality of conductive tabs extending from opposite sides of the digit line, and electrically coupled to a source/drain of the plurality of access transistors.
Claim 2
Dependent Claim
88 words
An integrated circuit memory device comprising: a plurality of memory cells fabricated in the integrated circuit memory device; a plurality of access transistors, each one of the plurality of access transistors having a source/drain connected to one of the plurality of memory cells and a gate connected to a word line; a conductive digit line fabricated in the integrated circuit memory device; and a plurality of conductive tabs extending from opposite sides of the digit line, and electrically coupled to a source/drain of the plurality of access transistors.
Claim 3
Dependent Claim
16 words
The integrated circuit memory device of claim 1, wherein the conductive tabs comprise metal or polysilicon.
Claim 4
Dependent Claim
19 words
The integrated circuit memory device of claim 1, wherein the digit line is fabricated as a layer of metal.
Claim 5
Dependent Claim
18 words
The integrated circuit memory device of claim 1, wherein the conductive tabs are orthogonal to the digit line.
Claim 6
Dependent Claim
20 words
The integrated circuit memory device of claim 1, wherein the conductive tabs are tapered in shape, with two non-parallel sides.
Claim 7
Dependent Claim
16 words
The integrated circuit memory device of claim 1, wherein the conductive tabs are rounded in shape.
Claim 8
Dependent Claim
16 words
The integrated circuit memory device of claim 1, wherein the conductive tabs are rectangular in shape.
Claim 9
Dependent Claim
88 words
An integrated circuit memory device comprising: a plurality of memory cells fabricated in the integrated circuit memory device; a plurality of access transistors, each one of the plurality of access transistors having a source/drain connected to one of the plurality of memory cells and a gate connected to a word line; a conductive digit line fabricated in the integrated circuit memory device; and a plurality of conductive tabs extending from one side of the digit line, and electrically coupled to a source/drain of the plurality of access transistors.
Claim 10
Dependent Claim
88 words
An integrated circuit memory device comprising: a plurality of memory cells fabricated in the integrated circuit memory device; a plurality of access transistors, each one of the plurality of access transistors having a source/drain connected to one of the plurality of memory cells and a gate connected to a word line; a conductive digit line fabricated in the integrated circuit memory device; and a plurality of conductive tabs extending from one side of the digit line, and electrically coupled to a source/drain of the plurality of access transistors.
Claim 11
Dependent Claim
16 words
The integrated circuit memory device of claim 8, wherein the conductive tabs comprise metal or polysilicon.
Claim 12
Dependent Claim
19 words
The integrated circuit memory device of claim 8, wherein the digit line is fabricated as a layer of metal.
Claim 13
Dependent Claim
18 words
The integrated circuit memory device of claim 8, wherein the conductive tabs are orthogonal to the digit line.
Claim 14
Dependent Claim
20 words
The integrated circuit memory device of claim 8, wherein the conductive tabs are tapered in shape, with two nonparallel sides.
Claim 15
Dependent Claim
16 words
The integrated circuit memory device of claim 8, wherein the conductive tabs are rounded in shape.
Claim 16
Dependent Claim
16 words
The integrated circuit memory device of claim 8, wherein the conductive tabs are rectangular in shape.
Claim 17
Dependent Claim
68 words
An integrated memory device comprising: an array of memory cells fabricated in adjacent columns; access transistors connected to the memory cells; word lines connected to the access transistors for selectively coupling the memory cells to a single digit line; and the single digit line having a plurality of conductive tabs extending from the single digit line and connecting to at least one of the columns of memory cells.
Claim 18
Dependent Claim
68 words
An integrated memory device comprising: an array of memory cells fabricated in adjacent columns; access transistors connected to the memory cells; word lines connected to the access transistors for selectively coupling the memory cells to a single digit line; and the single digit line having a plurality of conductive tabs extending from the single digit line and connecting to at least one of the columns of memory cells.
Claim 19
Dependent Claim
31 words
The integrated memory device of claim 15 wherein the plurality of conductive tabs extend from opposite sides of the single digit line to connect to the adjacent columns of memory cells.
Claim 20
Dependent Claim
19 words
The integrated memory device of claim 16 wherein the conductive tabs extend substantially orthogonally from the single digit line.
Claim 21
Dependent Claim
52 words
The integrated memory device of claim 15 wherein the single digit line is fabricated above a first one of the adjacent column of memory cells, the plurality of conductive tabs extend from one side of the single digit line to connect to a second one of the adjacent columns of memory cells.
Claim 22
Dependent Claim
137 words
An integrated circuit memory device comprising: a plurality of memory cells fabricated in the integrated circuit memory device, such that spacing between adjacent memory cells in a first direction is N distance; a plurality of access transistors, each one of the plurality of access transistors having a source/drain connected to one of the plurality of memory cells and a gate connected to a word line; a plurality of conductive digit lines fabricated in the integrated circuit memory device in a second direction, wherein the second direction is orthogonal to the first direction and spacing between adjacent digit lines in the first direction is 2×N Distance; and a plurality of conductive tabs extending from at least one side of the digit line, wherein the conductive tabs are electrically coupled to a source/drain of the plurality of access transistors.
Claim 23
Dependent Claim
137 words
An integrated circuit memory device comprising: a plurality of memory cells fabricated in the integrated circuit memory device, such that spacing between adjacent memory cells in a first direction is N distance; a plurality of access transistors, each one of the plurality of access transistors having a source/drain connected to one of the plurality of memory cells and a gate connected to a word line; a plurality of conductive digit lines fabricated in the integrated circuit memory device in a second direction, wherein the second direction is orthogonal to the first direction and spacing between adjacent digit lines in the first direction is 2×N Distance; and a plurality of conductive tabs extending from at least one side of the digit line, wherein the conductive tabs are electrically coupled to a source/drain of the plurality of access transistors.
Claim 24
Dependent Claim
114 words
An integrated circuit memory device comprising: a plurality of memory cells fabricated in the integrated circuit memory device in a plurality of columns, such that memory cells of each column are linearly arrayed, and memory cells of adjacent columns are nonlinearly arrayed; a plurality of access transistors, each one of the plurality of access transistors having a source/drain connected to one of the plurality of memory cells and a gate connected to a word line; and a conductive digit line fabricated in the integrated circuit memory device and coupled to the plurality of columns, the conductive digit line having a plurality of conductive tabs extending from at least one side of the digit line.
Claim 25
Dependent Claim
114 words
An integrated circuit memory device comprising: a plurality of memory cells fabricated in the integrated circuit memory device in a plurality of columns, such that memory cells of each column are linearly arrayed, and memory cells of adjacent columns are nonlinearly arrayed; a plurality of access transistors, each one of the plurality of access transistors having a source/drain connected to one of the plurality of memory cells and a gate connected to a word line; and a conductive digit line fabricated in the integrated circuit memory device and coupled to the plurality of columns, the conductive digit line having a plurality of conductive tabs extending from at least one side of the digit line.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-02-01 | 2002-08-03 | 2003-02-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-02-01 | 2006-08-03 | 2007-02-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-02-01 | 2010-08-03 | 2011-02-02 | $7700.00 | Window Closed / Lapsed |