US5858835A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for fabricating a capactior in a DRAM cell
Assignee: Nanya Technology Corp
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Filing: 1997-12-22
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Granted: 1999-01-12
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Expires: 2017-12-22
Abstract
Abstract A method for fabricating a capacitor over a semiconductor substrate is disclosed. The method includes the steps of: forming an insulating layer over the semiconductor substrate; forming a contact opening through the insulating layer to expose a portion of the semiconductor substrate; forming a first polysilicon layer over the insulating layer and filling in the contact opening to electrically contact the semiconductor substrate; patterning the first polysilicon layer to the insulating layer surface, thereby forming a trench for defining a capacitor region; forming a thin polysilicon layer with a rugged surface over the first polysilicon layer and the insulating layer; forming a mask layer over the thin polysilicon layer, wherein the mask layer has a smaller thickness in the trench bottom than in other regions; removing the mask layer in the trench bottom through an anisotropical etch step; removing the uncovered portions of the thin polysilicon layer to expose the insulating layer surface; removing the mask layer, thereby forming a storage electrode consisting of the thin polysilicon layer and the first polysilicon layer; forming a dielectric layer over the storage electrode and the exposed insulating layer; and forming a second polysilicon layer over the dielectric layer.
Inventors
- 👤 Chi-Hui Lin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 19:44
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/692; H10D1/711; H10D1/712
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
194 words
A method for fabricating a capacitor of a DRAM cell over a semiconductor substrate, comprising the steps of forming an insulating layer over the semiconductor substrate; forming a contact opening through the insulating layer to expose a portion of the semiconductor substrate; forming a first polysilicon layer over the insulating layer and filling in the contact opening to electrically contact the semiconductor substrate; patterning the first polysilicon layer to the insulating layer surface, thereby forming a trench for defining a capacitor region; forming a thin polysilicon layer with a rugged surface over the first polysilicon layer and the insulating layer; forming a mask layer over the thin polysilicon layer, wherein the mask layer is thinner in the trench bottom than in other regions; removing the mask layer in the trench bottom through an anisotropical etch step; removing the uncovered portions of the thin polysilicon layer to expose the insulating layer surface; removing the mask layer, thereby forming a storage electrode consisting of the thin polysilicon layer and the first polysilicon layer; forming a dielectric layer over the storage electrode and the exposed insulating layer; and forming a second polysilicon layer over the dielectric layer.
Claim 2
Independent Claim
194 words
A method for fabricating a capacitor of a DRAM cell over a semiconductor substrate, comprising the steps of forming an insulating layer over the semiconductor substrate; forming a contact opening through the insulating layer to expose a portion of the semiconductor substrate; forming a first polysilicon layer over the insulating layer and filling in the contact opening to electrically contact the semiconductor substrate; patterning the first polysilicon layer to the insulating layer surface, thereby forming a trench for defining a capacitor region; forming a thin polysilicon layer with a rugged surface over the first polysilicon layer and the insulating layer; forming a mask layer over the thin polysilicon layer, wherein the mask layer is thinner in the trench bottom than in other regions; removing the mask layer in the trench bottom through an anisotropical etch step; removing the uncovered portions of the thin polysilicon layer to expose the insulating layer surface; removing the mask layer, thereby forming a storage electrode consisting of the thin polysilicon layer and the first polysilicon layer; forming a dielectric layer over the storage electrode and the exposed insulating layer; and forming a second polysilicon layer over the dielectric layer.
Claim 3
Dependent Claim
22 words
The method as claimed in claim 1, wherein the insulating layer includes a BPSG layer in which a bit line is embedded.
Claim 4
Dependent Claim
20 words
The method as claimed in claim 1, wherein the thin polysilicon layer is formed by low-pressure chemical vapor deposition (LPCVD).
Claim 5
Dependent Claim
21 words
The method as claimed in claim 1, wherein the mask layer is an oxide layer formed by reacting silane or TEOS.
Claim 6
Dependent Claim
28 words
The method as claimed in claim 1, wherein the dielectric layer includes a material selected from the group of oxide, nitride, Ta 2 O 5 and ferroelectric material.
Claim 7
Independent Claim
172 words
A method for fabricating a storage electrode of a capacitor over a semiconductor substrate, comprising the steps of forming an insulating layer over the semiconductor substrate; forming a contact opening through the insulating layer to expose a portion of the semiconductor substrate; forming a first polysilicon layer over the insulating layer and filling in the contact opening to electrically contact the semiconductor substrate; patterning the first polysilicon layer to the insulating layer surface, thereby forming a trench for defining a capacitor region; forming a thin polysilicon layer with a rugged surface over the first polysilicon layer and the insulating layer; forming a mask layer over the thin polysilicon layer, wherein the mask layer is thinner in the trench bottom than in other regions; removing the mask layer in the trench bottom through an anisotropical etch step; removing the uncovered portions of the thin polysilicon layer to expose the insulating layer surface; and removing the mask layer, thereby forming a storage electrode consisting of the thin polysilicon layer and the first polysilicon layer.
Claim 8
Independent Claim
172 words
A method for fabricating a storage electrode of a capacitor over a semiconductor substrate, comprising the steps of forming an insulating layer over the semiconductor substrate; forming a contact opening through the insulating layer to expose a portion of the semiconductor substrate; forming a first polysilicon layer over the insulating layer and filling in the contact opening to electrically contact the semiconductor substrate; patterning the first polysilicon layer to the insulating layer surface, thereby forming a trench for defining a capacitor region; forming a thin polysilicon layer with a rugged surface over the first polysilicon layer and the insulating layer; forming a mask layer over the thin polysilicon layer, wherein the mask layer is thinner in the trench bottom than in other regions; removing the mask layer in the trench bottom through an anisotropical etch step; removing the uncovered portions of the thin polysilicon layer to expose the insulating layer surface; and removing the mask layer, thereby forming a storage electrode consisting of the thin polysilicon layer and the first polysilicon layer.
Claim 9
Dependent Claim
15 words
The method as claimed in claim 6, wherein the insulating layer includes a BPSG layer.
Claim 10
Dependent Claim
16 words
The method as claimed in claim 6, wherein the first conducting layer is a polysilicon layer.
Claim 11
Dependent Claim
16 words
The method as claimed in claim 6, wherein the thin polysilicon layer is formed by LPCVD.
Claim 12
Dependent Claim
23 words
The method as claimed in claim 6, wherein the mask layer is an oxide layer which is formed by reacting silane or TEOS.
References Cited (Backward Citations)
US5622889A
Cited
US5554557A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-01-11 | 2002-07-13 | 2003-01-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-01-11 | 2006-07-13 | 2007-01-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-01-11 | 2010-07-13 | 2011-01-12 | $7700.00 | Window Closed / Lapsed |