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US5854513A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device having a bump structure and test electrode

Assignee: LG Display Co Ltd
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Filing: 1996-07-12
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Granted: 1998-12-29
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Expires: 2016-07-12
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Abstract

Abstract A bump structure of a semiconductor device includes at least one pad electrode formed on a semiconductor substrate; a test electrode formed on the semiconductor substrate, the pad electrode and the test electrode being located separately from one another; a passivation layer formed on an area of the semiconductor substrate other than that covered by the pad electrode and the test electrode; a metal layer integrally formed on a portion of the pad electrode and on a portion of the test electrode adjacent to the pad electrode; and a bump formed on an overall surface of the metal layer.

Inventors

  • 👤 Seong Jin Kim

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 15:10
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/071; H10W72/20; H10W72/01; H10W72/012; H10W72/01221; H10W72/01225; H10W72/241; H10W72/244; H10W72/251; H10W72/252; H10W72/50; H10W72/531; H10W72/536; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W72/90; H10W72/921; H10W72/923; H10W72/951; H10W72/952

Claims Analysis

Total Claims: 25
Claim 1
Independent Claim 121 words
A bump structure of a semiconductor device, the bump structure comprising: at least one pad electrode on a semiconductor substrate; a test electrode on the semiconductor substrate, the pad electrode and the test electrode being located separately from one another; a passivation layer on an area of the semiconductor substrate other than that covered by the pad electrode and the test electrode; a base metal layer formed on a portion of the pad electrode and on a portion of the test electrode adjacent to the pad electrode, the remaining portion of the test electrode extending beyond the base metal layer so as to be accessible by a test probe; and a bump on an overall surface of the base metal layer.
Claim 2
Dependent Claim 121 words
A bump structure of a semiconductor device, the bump structure comprising: at least one pad electrode on a semiconductor substrate; a test electrode on the semiconductor substrate, the pad electrode and the test electrode being located separately from one another; a passivation layer on an area of the semiconductor substrate other than that covered by the pad electrode and the test electrode; a base metal layer formed on a portion of the pad electrode and on a portion of the test electrode adjacent to the pad electrode, the remaining portion of the test electrode extending beyond the base metal layer so as to be accessible by a test probe; and a bump on an overall surface of the base metal layer.
Claim 3
Dependent Claim 30 words
The bump structure of a semiconductor device as claimed in claim 1, wherein the bump includes a material selected from a group including Pb/Sn, Ln alloy, Ni, Cu and Au.
Claim 4
Dependent Claim 32 words
The bump structure of a semiconductor device as claimed in claim 1, wherein Ti/W material is included in the base metal layer that is formed on the area of the semiconductor substrate.
Claim 5
Dependent Claim 19 words
The bump structure of a semiconductor device as claimed in claim 1, wherein the base metal layer includes Cr/Cu.
Claim 6
Dependent Claim 24 words
The bump structure of a semiconductor device as claimed in claim 1, wherein the bump includes a solder bump on the base metal layer.
Claim 7
Dependent Claim 120 words
A bump structure of a semiconductor device, the bump structure comprising: a pad electrode on a semiconductor substrate; a test electrode on the semiconductor substrate, the pad electrode and the test electrode being located separate from one another; a passivation layer over the semiconductor substrate, at least a portion of the passivation layer being on an area of the semiconductor substrate other than that covered by the pad electrode and the test electrode; and a bump over the semiconductor substrate in electrically conductive contact with the pad electrode and the test electrode, wherein the test electrode comprises a first portion located adjacent the bump and a second portion configured to allow contact between the second portion and a test probe.
Claim 8
Dependent Claim 120 words
A bump structure of a semiconductor device, the bump structure comprising: a pad electrode on a semiconductor substrate; a test electrode on the semiconductor substrate, the pad electrode and the test electrode being located separate from one another; a passivation layer over the semiconductor substrate, at least a portion of the passivation layer being on an area of the semiconductor substrate other than that covered by the pad electrode and the test electrode; and a bump over the semiconductor substrate in electrically conductive contact with the pad electrode and the test electrode, wherein the test electrode comprises a first portion located adjacent the bump and a second portion configured to allow contact between the second portion and a test probe.
Claim 9
Dependent Claim 53 words
The bump structure of a semiconductor device as claimed in claim 6, further comprising a metal layer on at least a portion of the pad electrode and on at least a portion of the test electrode, the metal layer providing an electrically conductive path between the bump and the pad and test electrodes.
Claim 10
Dependent Claim 29 words
The bump structure of a semiconductor device as claimed in claim 6, wherein the second portion of the test electrode lies exposed on a surface of the semiconductor substrate.
Claim 11
Dependent Claim 34 words
The bump structure of a semiconductor device as claimed in claim 6, wherein the bump includes a double-step stud bump on at least a portion of each of the pad electrode and test electrode.
Claim 12
Dependent Claim 23 words
The bump structure of a semiconductor device as claimed in claim 7, wherein the bump includes a solder bump on the metal layer.
Claim 13
Dependent Claim 127 words
A bump structure of a semiconductor device, the bump structure comprising: at least one pad electrode on a semiconductor substrate; a test electrode on the semiconductor substrate, the pad electrode and the test electrode being located separately from one another; a passivation layer on an area of the semiconductor substrate other than that covered by the pad electrode and the test electrode; a base metal layer integrally formed on a portion of the pad electrode and on a portion of the test electrode adjacent to the pad electrode; and a bump on an overall surface of the metal layer, wherein the test electrode comprises a first portion located adjacent the bump and a second portion configured to allow contact between the second portion and a test probe.
Claim 14
Dependent Claim 127 words
A bump structure of a semiconductor device, the bump structure comprising: at least one pad electrode on a semiconductor substrate; a test electrode on the semiconductor substrate, the pad electrode and the test electrode being located separately from one another; a passivation layer on an area of the semiconductor substrate other than that covered by the pad electrode and the test electrode; a base metal layer integrally formed on a portion of the pad electrode and on a portion of the test electrode adjacent to the pad electrode; and a bump on an overall surface of the metal layer, wherein the test electrode comprises a first portion located adjacent the bump and a second portion configured to allow contact between the second portion and a test probe.
Claim 15
Dependent Claim 30 words
The bump structure of a semiconductor device as claimed in claim 11, wherein the bump includes a material selected from a group including Pb/Sn, Ln alloy, Ni, Cu and Au.
Claim 16
Dependent Claim 32 words
The bump structure of a semiconductor device as claimed in claim 11, wherein Ti/W material is included in the base metal layer that is formed on the area of the semiconductor substrate.
Claim 17
Dependent Claim 19 words
The bump structure of a semiconductor device as claimed in claim 11, wherein the base metal layer includes Cr/Cu.
Claim 18
Dependent Claim 24 words
The bump structure of a semiconductor device as claimed in claim 11, wherein the bump includes a solder bump on the base metal layer.
Claim 19
Dependent Claim 29 words
The bump structure of a semiconductor device as claimed in claim 11, wherein the second portion of the test electrode lies exposed on a surface of the semiconductor substrate.
Claim 20
Dependent Claim 110 words
A bump structure of a semiconductor device comprising: a substrate; a pad electrode on the substrate; a test electrode on the substrate adjacent the pad electrode; a passivation layer covering the substrate, the pad electrode and the test electrode, the passivation layer having a first hole over the pad electrode, a second hole over the test electrode, and a third hole over the test electrode; a base metal layer in the first hole over the pad electrode and the second hole over the test electrode, and the base metal layer on the passivation layer between the pad electrode and the test electrode; and a bump on the base metal layer.
Claim 21
Dependent Claim 110 words
A bump structure of a semiconductor device comprising: a substrate; a pad electrode on the substrate; a test electrode on the substrate adjacent the pad electrode; a passivation layer covering the substrate, the pad electrode and the test electrode, the passivation layer having a first hole over the pad electrode, a second hole over the test electrode, and a third hole over the test electrode; a base metal layer in the first hole over the pad electrode and the second hole over the test electrode, and the base metal layer on the passivation layer between the pad electrode and the test electrode; and a bump on the base metal layer.
Claim 22
Dependent Claim 30 words
The bump structure of a semiconductor device as claimed in claim 17, wherein the bump includes a material selected from a group including Pb/Sn, Ln alloy, Ni, Cu and Au.
Claim 23
Dependent Claim 20 words
The bump structure of a semiconductor device as claimed in claim 17, wherein the base metal layer includes Ti/W material.
Claim 24
Dependent Claim 19 words
The bump structure of a semiconductor device as claimed in claim 17, wherein the base metal layer includes Cr/Cu.
Claim 25
Dependent Claim 19 words
The bump structure of a semiconductor device as claimed in claim 17, wherein the bump includes a solder bump.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-12-28 2002-06-29 2002-12-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-12-28 2006-06-29 2006-12-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-12-28 2010-06-29 2010-12-29 $7700.00 Window Closed / Lapsed

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