Vertical diode structures with low series resistance

Claim 1

A method for forming a diode on a silicon wafer, the silicon wafer having an exposed surface and being doped with a first conductivity type dopant, the method comprising the steps of: (a) highly doping a portion of the exposed surface of the silicon wafer with a second conductivity type dopant to form an active region; (b) disposing a first refractory metal silicide layer over said active region; (c) forming a layer of insulation material over said first refractory metal silicide layer; (d) etching a diode opening through said layer of insulation material to expose a portion of said first refractory metal silicide layer, said diode opening being defined by an interior surface; (e) filling said diode opening with an amorphous silicon to form a silicon plug, said silicon plug comprising a bottom portion contacting said active region and a top portion separated from said active region by said bottom portion; (f) lightly doping said amorphous silicon with said second conductivity type of dopant; (g) heating said amorphous silicon to convert said amorphous silicon to large grain polysilicon; (h) highly doping said top portion of said silicon plug with said first conductivity type of dopant; and (i) securing a metal contact onto said top portion of said silicon plug.

Claim 2

A method for forming a diode on a silicon wafer, the silicon wafer having an exposed surface and being doped with a first conductivity type dopant, the method comprising the steps of: (a) highly doping a portion of the exposed surface of the silicon wafer with a second conductivity type dopant to form an active region; (b) disposing a first refractory metal silicide layer over said active region; (c) forming a layer of insulation material over said first refractory metal silicide layer; (d) etching a diode opening through said layer of insulation material to expose a portion of said first refractory metal silicide layer, said diode opening being defined by an interior surface; (e) filling said diode opening with an amorphous silicon to form a silicon plug, said silicon plug comprising a bottom portion contacting said active region and a top portion separated from said active region by said bottom portion; (f) lightly doping said amorphous silicon with said second conductivity type of dopant; (g) heating said amorphous silicon to convert said amorphous silicon to large grain polysilicon; (h) highly doping said top portion of said silicon plug with said first conductivity type of dopant; and (i) securing a metal contact onto said top portion of said silicon plug.

Claim 16

A method for forming a diode on a silicon wafer, the silicon wafer having an exposed surface and being doped with a first conductivity type dopant, the method comprising the steps of: (a) highly doping a portion of the exposed surface of the silicon wafer with a second conductivity type dopant to form an active region; (b) disposing a first refractory metal silicide layer over said active region; (c) forming a layer of insulation material over said first refractory metal silicide layer; (d) etching a diode opening through said layer of insulation material to expose a portion of said first refractory metal silicide layer, said diode opening being defined by an interior surface; (e) covering said layer of insulation material and said interior surface of said diode opening with a polysilicon layer; (f) applying a refractory metal layer over said polysilicon layer; (g) exposing said refractory metal layer to a temperature sufficient to chemically react said polysilicon layer with said refractory metal layer to form a second refractory metal silicide layer positioned over said layer of insulation material and on said interior surface of said diode opening; (h) depositing a layer of said amorphous silicon over said refractory metal silicide layer so as to fill said diode opening; (i) removing said layer of amorphous silicon and said second refractory metal silicide layer overlying said layer of insulation to form a silicon plug within said diode opening, said silicon plug comprising a bottom portion contacting said second refractory metal silicide layer lining said diode opening and a top portion partially bounded by said bottom portion so as to be separated from said second refractory metal silicide layer; (j) lightly doping said amorphous silicon with said second conductivity type of dopant; (k) heating said amorphous silicon to convert said amorphous silicon to large grain polysilicon; (l) implanting a high concentration of ions of said first conductivity type of dopant within said top portion of said silicon plug; (m) annealing said top portion of said silicon plug having said ions of said first type of dopant implanted therein; (n) positioning an insulative silicon layer on said layer of insulation and over said diode opening; (o) etching a passageway through said insulative silicon layer and down to said top portion of said silicon plug; (p) placing a layer of chalcaginide material over said insulative silicon layer and within said passageway so as to contact said top portion of said silicon plug; (q) locating a layer of titanium nitride over said chalcaginide material; and (r) securing a metal contact onto said layer of titanium nitride.

Claim 17

A method for forming a diode on a silicon wafer, the silicon wafer having an exposed surface and being doped with a first conductivity type dopant, the method comprising the steps of: (a) highly doping a portion of the exposed surface of the silicon wafer with a second conductivity type dopant to form an active region; (b) disposing a first refractory metal silicide layer over said active region; (c) forming a layer of insulation material over said first refractory metal silicide layer; (d) etching a diode opening through said layer of insulation material to expose a portion of said first refractory metal silicide layer, said diode opening being defined by an interior surface; (e) covering said layer of insulation material and said interior surface of said diode opening with a polysilicon layer; (f) applying a refractory metal layer over said polysilicon layer; (g) exposing said refractory metal layer to a temperature sufficient to chemically react said polysilicon layer with said refractory metal layer to form a second refractory metal silicide layer positioned over said layer of insulation material and on said interior surface of said diode opening; (h) depositing a layer of said amorphous silicon over said refractory metal silicide layer so as to fill said diode opening; (i) removing said layer of amorphous silicon and said second refractory metal silicide layer overlying said layer of insulation to form a silicon plug within said diode opening, said silicon plug comprising a bottom portion contacting said second refractory metal silicide layer lining said diode opening and a top portion partially bounded by said bottom portion so as to be separated from said second refractory metal silicide layer; (j) lightly doping said amorphous silicon with said second conductivity type of dopant; (k) heating said amorphous silicon to convert said amorphous silicon to large grain polysilicon; (l) implanting a high concentration of ions of said first conductivity type of dopant within said top portion of said silicon plug; (m) annealing said top portion of said silicon plug having said ions of said first type of dopant implanted therein; (n) positioning an insulative silicon layer on said layer of insulation and over said diode opening; (o) etching a passageway through said insulative silicon layer and down to said top portion of said silicon plug; (p) placing a layer of chalcaginide material over said insulative silicon layer and within said passageway so as to contact said top portion of said silicon plug; (q) locating a layer of titanium nitride over said chalcaginide material; and (r) securing a metal contact onto said layer of titanium nitride.