Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
168 words
A flash memory device comprising: a semiconductor substrate of a first conductive type; a field insulating layer buried in a first trench formed in said semiconductor substrate in order to define an active region; a tunnel insulating film formed on said active region; a first conductive layer for a floating gate formed on said tunnel insulating film; spacers formed on both said tunnel insulating film and the sidewalls of said first conductive layer; a buried insulating layer buried in a second trench formed by etching said substrate adjacent to said spacers; a buried junction layer contacting a lower portion and sidewalls of said buried insulating layer, and acting as a source and drain region including impurities of a second conductive type; a second conductive layer formed on said first conductive layer and connected to said first conductive layer to be used as a floating gate; an insulating layer formed on said second conductive layer; and a third conductive layer for a control gate formed on said insulating layer.
Claim 2
Dependent Claim
168 words
A flash memory device comprising: a semiconductor substrate of a first conductive type; a field insulating layer buried in a first trench formed in said semiconductor substrate in order to define an active region; a tunnel insulating film formed on said active region; a first conductive layer for a floating gate formed on said tunnel insulating film; spacers formed on both said tunnel insulating film and the sidewalls of said first conductive layer; a buried insulating layer buried in a second trench formed by etching said substrate adjacent to said spacers; a buried junction layer contacting a lower portion and sidewalls of said buried insulating layer, and acting as a source and drain region including impurities of a second conductive type; a second conductive layer formed on said first conductive layer and connected to said first conductive layer to be used as a floating gate; an insulating layer formed on said second conductive layer; and a third conductive layer for a control gate formed on said insulating layer.
Claim 3
Dependent Claim
23 words
A flash memory device according to claim 1, wherein said insulating layer is formed of a composite film of oxide/nitride/oxide film (ONO film).
Claim 4
Dependent Claim
21 words
A flash memory device according to claim 1, wherein said first and second conductive layers are formed of a polysilicon film.
Claim 5
Dependent Claim
24 words
A flash memory device according to claim 1, wherein said first conductive type is a P-type and said second conductive type is an N-type.
Claim 6
Dependent Claim
24 words
A flash memory device according to claim 1, wherein a depth of said first trench is greater than a depth of said second trench.
Claim 7
Dependent Claim
178 words
A flash memory device comprising: a semiconductor substrate of a first conductive type; a field insulating layer buried in a trench formed on said semiconductor substrate of a first conductive type in order to define an active region; a tunnel insulating film formed on said active region; first and second conductive layers which are patterned to define a plurality of floating gates which extend on said tunnel insulating film and said field insulating layer; an insulating layer formed on said second conductive layer; a third conductive layer for a control gate formed on said insulating layer; a first impurity layer for cell channel stop regions formed of impurities of a first conductive type in said semiconductor substrate, said channel stop regions extending between said floating gates formed on said tunnel insulating film; and a second impurity layer for a source/drain region of a select transistor of a second conductive type, opposite to said first conductive type, in said semiconductor substrate, said source/drain region of the select transistor extending between said floating gates formed on said field insulating layer.
Claim 8
Dependent Claim
178 words
A flash memory device comprising: a semiconductor substrate of a first conductive type; a field insulating layer buried in a trench formed on said semiconductor substrate of a first conductive type in order to define an active region; a tunnel insulating film formed on said active region; first and second conductive layers which are patterned to define a plurality of floating gates which extend on said tunnel insulating film and said field insulating layer; an insulating layer formed on said second conductive layer; a third conductive layer for a control gate formed on said insulating layer; a first impurity layer for cell channel stop regions formed of impurities of a first conductive type in said semiconductor substrate, said channel stop regions extending between said floating gates formed on said tunnel insulating film; and a second impurity layer for a source/drain region of a select transistor of a second conductive type, opposite to said first conductive type, in said semiconductor substrate, said source/drain region of the select transistor extending between said floating gates formed on said field insulating layer.
Claim 9
Dependent Claim
24 words
A flash memory device according to claim 6, wherein said first conductive type is a P-type and said second conductive type is an n-type.
Claim 10
Dependent Claim
181 words
A flash memory device comprising: a semiconductor substrate of a first conductive type; a field insulating layer buried in a first trench formed in said semiconductor substrate of a first conductive type in order to define an active region; a tunnel insulating film formed on said active region; first and second conductive layers which are patterned to define a plurality of floating gates which extend on said tunnel insulating film and said field insulating layer; an insulating layer formed on said second conductive layer; a third conductive layer for a control gate formed on said insulating layer; a first impurity layer for cell channel stop regions formed of impurities of a first conductive type in a lower portion of a second trench formed by etching said semiconductor substrate between adjacent ones of said floating gates formed on said tunnel insulating layer; and a second impurity layer for a source and drain of a select transistor formed of a second conductive type, opposite to said first conductive type, in said semiconductor substrate between respective floating gates formed on said field insulating layer.
Claim 11
Dependent Claim
181 words
A flash memory device comprising: a semiconductor substrate of a first conductive type; a field insulating layer buried in a first trench formed in said semiconductor substrate of a first conductive type in order to define an active region; a tunnel insulating film formed on said active region; first and second conductive layers which are patterned to define a plurality of floating gates which extend on said tunnel insulating film and said field insulating layer; an insulating layer formed on said second conductive layer; a third conductive layer for a control gate formed on said insulating layer; a first impurity layer for cell channel stop regions formed of impurities of a first conductive type in a lower portion of a second trench formed by etching said semiconductor substrate between adjacent ones of said floating gates formed on said tunnel insulating layer; and a second impurity layer for a source and drain of a select transistor formed of a second conductive type, opposite to said first conductive type, in said semiconductor substrate between respective floating gates formed on said field insulating layer.
Claim 12
Dependent Claim
24 words
A flash memory device according to claim 8, wherein said first conductive type is a P-type, and said second conductive type is an N-type.
Claim 13
Dependent Claim
18 words
A flash memory device according to claim 8, wherein said first trench is deeper than said second trench.