Chip carrier with peripheral stiffener and semiconductor device using the same

Claim 2

A chip carrier comprising a carrier substrate and a peripheral stiffener provided at the periphery of said carrier substrate, said carrier substrate comprising: a flexible insulating substrate containing aramid fiber as a reinforcer, first bonding pads formed on one face of said flexible insulating substrate, and second bonding pads formed on the other face of said flexible insulating substrate, said first bonding pads and said second bonding pads being electrically bonded to each other by via-holes punched in said flexible insulating substrate, wherein said peripheral stiffener is made of a material whose thermal expansion coefficient is sufficiently higher than that of said carrier substrate to resist warping of the carrier substrate due to temperature fluctuations.

Claim 3

The chip carrier according to claim 1, wherein said peripheral stiffener is a metal.

Claim 4

The chip carrier according to claim 1, wherein said peripheral stiffener is formed in a zigzag pattern.

Claim 5

The chip carrier according to claim 1, wherein said carrier substrate is a resin multilayered substrate with inner via-holes, and the open ends of said via-holes are prevented from being exposed to the surface of said flexible insulating substrate.

Claim 6

The chip carrier according to claim 1, wherein said first bonding pads and said second bonding pads are formed with patterns different from each other.

Claim 7

The chip carrier according to claim 1, wherein balls are provided at the upper surface of said the second bonding pads.

Claim 8

A semiconductor device comprising a carrier substrate, a peripheral stiffener provided at the periphery of said carrier substrate, and a semiconductor chip mounted in a recess defined by said carrier substrate and said peripheral stiffener, where said carrier substrate comprises: a flexible insulating substrate containing aramid fiber as a reinforcer, first bonding pads formed on one face of said flexible insulating substrate, and second bonding pads formed on the other face of said flexible insulating substrate, said first bonding pads and said second bonding pads being electrically bonded to each other by via-holes punched in said flexible insulating substrate, wherein said peripheral stiffener is made of materials whose thermal expansion coefficient is sufficiently higher than that of said carrier substrate to resist warping of the carrier substrate due to temperature fluctuations.

Claim 9

A semiconductor device comprising a carrier substrate, a peripheral stiffener provided at the periphery of said carrier substrate, and a semiconductor chip mounted in a recess defined by said carrier substrate and said peripheral stiffener, where said carrier substrate comprises: a flexible insulating substrate containing aramid fiber as a reinforcer, first bonding pads formed on one face of said flexible insulating substrate, and second bonding pads formed on the other face of said flexible insulating substrate, said first bonding pads and said second bonding pads being electrically bonded to each other by via-holes punched in said flexible insulating substrate, wherein said peripheral stiffener is made of materials whose thermal expansion coefficient is sufficiently higher than that of said carrier substrate to resist warping of the carrier substrate due to temperature fluctuations.

Claim 10

The semiconductor device according to claim 7, wherein said peripheral stiffener is a metal.

Claim 11

The semiconductor device according to claim 7, wherein said peripheral stiffener is formed in a zigzag pattern.

Claim 12

The semiconductor device according to claim 7, wherein said carrier substrate is a resin multilayered substrate with inner via-holes, and the open ends of said via-holes are prevented from being exposed to the surface of said flexible insulating substrate.

Claim 13

The semiconductor device according to claim 7, wherein said first bonding pads and said second bonding pads are formed with patterns different from each other.

Claim 14

The semiconductor device according to claim 7, wherein balls are provided at the upper surface of said the second bonding pads.

Claim 15

The semiconductor device according to claim 7, wherein said peripheral stiffener is thinner than said semiconductor chip.

Claim 16

The semiconductor device according to claim 7, wherein said semiconductor chip is flip-chip packaged.

Claim 17

The semiconductor device according to claim 14, wherein said semiconductor chip has area array type terminal electrodes.

Claim 18

The semiconductor device according to claim 7, wherein a finned heat sink is provided at an upper surface of said semiconductor chip.

Claim 19

The semiconductor device according to claim 7, wherein a finned heat sink is provided in order to cover an upper surface of said semiconductor chip and to cover the periphery of said chip carrier.

Claim 20

The semiconductor device of claim 7, wherein said thermal expansion coefficient of said peripheral stiffener is higher than that of said carrier substrate by 3-20 ppm/°C.

Claim 21

The chip carrier of claim 1, wherein said thermal expansion coefficient of said peripheral stiffener is higher than that of said carrier substrate by 3-20 ppm/°C.