High density multi-layered printed wiring board, multi-chip carrier and semiconductor package

Claim 2

A multi-chip carrier assembly comprising: a high density multi-layered printed wiring board including: a substrate made of a material having a higher heat conductivity than that of resins; a build-up layer formed on a first side of said substrate, said build-up layer being provided with interlayer insulations and conductive layers that are alternately laminated; an electronic parts mounting area defined on a top surface of said build-up layer; and a first plurality of I/O terminals provided, on the top surface of said build-up layer, at an area between said electronic parts mounting area and an edge of said substrate: and a substrate supporter including: a printed wiring board part consisting essentially of a resin material; a window formed in said printed wiring board part and dimensioned for receipt of said high density multi-layered printed wiring board while a second side of said substrate, which is opposite to the first side of said substrate, is exposed from the window; a plurality of bonding pads surrounding the window; a second plurality of I/O terminals surrounding the group of said plurality of bonding pads; and at least one conductive pattern for electrically connecting respective bonding pads and respective I/O terminals of said first plurality of I/O terminals.

Claim 3

A multi-chip carrier assembly according to claim 1, wherein each of said interlayer insulations is made of a photosensitive epoxy resin.

Claim 4

A multi-chip carrier assembly according to claim 1, wherein each of said conductive layers consists of a copper conductive layer and a groundwork layer placed between the copper conductive layer and one of said interlayer insulations, and wherein said groundwork layer includes a metal thin layer made of a metal selected from the group consisting of chrome, titanium and nickel.

Claim 5

A multi-chip carrier assembly according to claim 1, wherein each of said conductive layers has a copper conductive layer; wherein a metal cover layer is provided between a top surface of each copper conductive layer and a bottom surface of the interlayer insulation covering the copper conductive layer; and wherein said metal cover layer is made of a metal which improves adhesion between a copper conductive layer and an interlayer insulation associated with the copper conductive layer.

Claim 6

A multi-chip carrier assembly according to claim 4, wherein said cover layer is made of nickel.

Claim 7

A semiconductor package comprising: a high density multi-layered printed wiring board including: a substrate made of a material having a higher heat conductivity than that of resins; a build-up layer formed on a first side of said substrate, said build-up layer being provided with interlayer insulations and conductive layers that are alternately laminated; an electronic parts mounting area defined on a top surface of said build-up layer; and a first plurality of I/O terminals provided, on the top surface of said build-up layer, at an area between said electronic parts mounting area and an edge of said substrate; a plurality of electronic parts mounted on the electronic parts mounting area provided on said build-up layer of said high density multi-layered printed wiring board; and a substrate supporter including: a printed wiring board part consisting essentially of a resin material; a window formed in said printed wiring board part and dimensioned for receipt of said high density multi-layered printed wiring board while a second side of said substrate, which is opposite to the first side of said substrate, is exposed from the window; a plurality of bonding pads surrounding the window; a second plurality of I/O terminals surrounding the group of said plurality of bonding pads; and at least one conductive pattern for electrically connecting respective bonding pads and respective I/O terminals of said first plurality of and terminals, and wherein the I/O terminals of said first plurality of I/O terminals of said build-up layer are electrically connected to the bonding pads on said substrate supporter.

Claim 8

A semiconductor package comprising: a high density multi-layered printed wiring board including: a substrate made of a material having a higher heat conductivity than that of resins; a build-up layer formed on a first side of said substrate, said build-up layer being provided with interlayer insulations and conductive layers that are alternately laminated; an electronic parts mounting area defined on a top surface of said build-up layer; and a first plurality of I/O terminals provided, on the top surface of said build-up layer, at an area between said electronic parts mounting area and an edge of said substrate; a plurality of electronic parts mounted on the electronic parts mounting area provided on said build-up layer of said high density multi-layered printed wiring board; and a substrate supporter including: a printed wiring board part consisting essentially of a resin material; a window formed in said printed wiring board part and dimensioned for receipt of said high density multi-layered printed wiring board while a second side of said substrate, which is opposite to the first side of said substrate, is exposed from the window; a plurality of bonding pads surrounding the window; a second plurality of I/O terminals surrounding the group of said plurality of bonding pads; and at least one conductive pattern for electrically connecting respective bonding pads and respective I/O terminals of said first plurality of and terminals, and wherein the I/O terminals of said first plurality of I/O terminals of said build-up layer are electrically connected to the bonding pads on said substrate supporter.

Claim 9

A semiconductor package according to claim 6 wherein, each of said interlayer insulations is made of a photosensitive epoxy resin.

Claim 10

A semiconductor package according to claim 6 wherein, each of said conductive layers consists of a copper conductive layer and a groundwork layer placed between the copper conductive layer and one of said interlayer insulations, and wherein said groundwork layer includes a metal thin layer made of a metal selected from the group consisting of chrome, titanium and nickel.

Claim 11

A semiconductor package according to claim 6 wherein, each of said conductive layers has a copper conductive layer; wherein a metal cover layer is provided between a top surface of each copper conductive layer and a bottom surface of the interlayer insulation covering the copper conductive layer; and wherein said metal cover layer is made of a metal which improves adhesion between a copper conductive layer and an interlayer insulation associated with the copper conductive layer.

Claim 12

A semiconductor package according to claim 9 wherein, said cover layer is made of nickel.

Claim 13

A semiconductor package comprising: a high density multi-layered printed wiring board including: a substrate made of a material having a higher heat conductivity than that of resins; a build-up layer formed on a first side of said substrate, said build-up layer being provided with interlayer insulations and conductive layers that are alternately laminated; an electronic parts mounting area defined on a top surface of said build-up layer; and a first plurality of I/O terminals provided, on the top surface of said build-up layer, at an area between said electronic parts mounting area and an edge of said substrate; a plurality of electronic parts mounted on the electronic parts mounting area provided on said build-up layer of said high density multi-layered printed wiring board; a lead frame provided with a plurality of leads surrounding an island supporting said high density multi-layered printed wiring board, said leads being electrically connected to the I/O terminals of said first plurality on said build-up layer; and a resin molding for sealing electrical connections with a second side of said substrate exposed.

Claim 14

A semiconductor package comprising: a high density multi-layered printed wiring board including: a substrate made of a material having a higher heat conductivity than that of resins; a build-up layer formed on a first side of said substrate, said build-up layer being provided with interlayer insulations and conductive layers that are alternately laminated; an electronic parts mounting area defined on a top surface of said build-up layer; and a first plurality of I/O terminals provided, on the top surface of said build-up layer, at an area between said electronic parts mounting area and an edge of said substrate; a plurality of electronic parts mounted on the electronic parts mounting area provided on said build-up layer of said high density multi-layered printed wiring board; a lead frame provided with a plurality of leads surrounding an island supporting said high density multi-layered printed wiring board, said leads being electrically connected to the I/O terminals of said first plurality on said build-up layer; and a resin molding for sealing electrical connections with a second side of said substrate exposed.

Claim 15

A semiconductor package according to claim 11 wherein, each of said interlayer insulations is made of a photosensitive epoxy resin.

Claim 16

A semiconductor package according to claim 11 wherein, each of said conductive layers consists of a copper conductive layer and a groundwork layer placed between the copper conductive layer and one of said interlayer insulations, and wherein said groundwork layer includes a metal thin layer made of a metal selected from the group consisting of chrome, titanium and nickel.

Claim 17

A semiconductor package according to claim 11 wherein, each of said conductive layers has a copper conductive layer; wherein a metal cover layer is provided between a top surface of each copper conductive layer and a bottom surface of the interlayer insulation covering the copper conductive layer; and wherein said metal cover layer is made of a metal which improves adhesion between a copper conductive layer and an interlayer insulation associated with the copper conductive layer.

Claim 18

A semiconductor package according to claim 14 wherein, said cover layer is made of nickel.

Claim 19

A high density multi-layered printed wiring board comprising: substrate having a higher heat conductivity than that of resins; a build-up layer formed on a first side of said substrate and having interlayer insulations and conductive layers that are alternately laminateed; an electronic parts mounting area defined on a top surface of said build-up layer; a first plurality of I/O terminals provided on the top surface of said build-up layer; a substrate supporter for mounting the multi-layered printed wiring board thereon and defining a window portion formed and dimensioned for supportive receipt of said high density multi-layered printed wiring board therein in a manner such that an opposite second side of said substrate is substantially exposed from the window, said substrate supporter including a second plurality of I/O terminals being electrically connected to said first plurality of I/O terminals.

Claim 20

A high density multi-layered printed wiring board comprising: substrate having a higher heat conductivity than that of resins; a build-up layer formed on a first side of said substrate and having interlayer insulations and conductive layers that are alternately laminateed; an electronic parts mounting area defined on a top surface of said build-up layer; a first plurality of I/O terminals provided on the top surface of said build-up layer; a substrate supporter for mounting the multi-layered printed wiring board thereon and defining a window portion formed and dimensioned for supportive receipt of said high density multi-layered printed wiring board therein in a manner such that an opposite second side of said substrate is substantially exposed from the window, said substrate supporter including a second plurality of I/O terminals being electrically connected to said first plurality of I/O terminals.

Claim 21

The high density multi-layered printed wiring board as defined in claim 16 wherein, said first plurality of 110 terminals are positioned between said electronic parts mounting area and an edge of said substrate.

Claim 22

A high density multi-layered printed wiring board comprising: a substrate having a higher heat conductivity than that of resins; a build-up layer formed on a first side of said substrate and having interlayer insulations and conductive layers that are alternately laminated; an electronic parts mounting area defined on a top surface of said build-up layer; a first plurality of I/O terminals provided on the top surface of said build-up layer; a lead frame including a plurality of leads, at least one of which being electrically connected to a respective I/O terminal of said first plurality of I/O terminals, and having an island member adapted to support the substrate thereon in a manner such that an opposite second side of said substrate is substantially exposed when mounted to said island member.

Claim 23

A high density multi-layered printed wiring board comprising: a substrate having a higher heat conductivity than that of resins; a build-up layer formed on a first side of said substrate and having interlayer insulations and conductive layers that are alternately laminated; an electronic parts mounting area defined on a top surface of said build-up layer; a first plurality of I/O terminals provided on the top surface of said build-up layer; a lead frame including a plurality of leads, at least one of which being electrically connected to a respective I/O terminal of said first plurality of I/O terminals, and having an island member adapted to support the substrate thereon in a manner such that an opposite second side of said substrate is substantially exposed when mounted to said island member.

Claim 24

The high density multi-layered printed wiring board as defined in claim 18 further including: a resin molding configured to seal electrical connections with a second side of the substrate while maintaining said substantial exposure thereof.

Claim 25

The high density multi-layered printed wiring board as defined in claim 18 wherein, said island member defining a window portion enabling said substantial exposure of said second side of said substrate.

Claim 26

The high density multi-layered printed wiring board as defined in claim 20 wherein, said lead frame defines an opening therethrough formed and dimensioned for receipt of the suspended substrate or said build-up layer therein.

Claim 27

The high density multi-layered printed wiring board as defined in claim 21 wherein, said plurality of I/O terminals of said build-up layer are positioned between said electronic parts mounting area and an edge of said substrate.

Claim 28

The high density multi-layered printed wiring board as defined in claim 22 wherein, said plurality of leads are positioned around said island member.