US5838203A
Expired / Lapsed
US
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Method and apparatus for generating waveforms using adiabatic circuitry
Assignee: Intel Corp
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Filing: 1996-12-06
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Granted: 1998-11-17
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Expires: 2016-12-06
Abstract
Abstract A method and an apparatus for generating oscillating waveforms using adiabatic circuitry. In one embodiment, an LC oscillating circuit generates oscillating waveforms that are replenished with replenishing circuitry. The replenishing circuitry includes enable circuitry and circuitry that reduces short circuit currents that may flow through the replenishing circuit. Furthermore, the pull-up and pull-down devices of the replenishing circuit are gradually turned on and gradually turned off to reduce the introduction of glitches into the oscillating sinusoidal waveform of the oscillating circuit. A control circuit, such as a phase lock loop circuit, is included with the present invention to receive an external clock reference waveform and match the frequency and phase of the oscillating waveform in the oscillating circuit to the external clock reference waveform. Control signals are generated by the phase lock loop circuit to control the pull-up and pull-down devices of the replenishing circuit to adjust the frequency and phase of the oscillating waveform in the oscillating circuit. Accordingly, the frequency and phase of the oscillating waveform may be controlled and adjusted with an external clock reference enabling the disclosed waveform generation circuit to be integrated into a system controlled by an external clock. Inverters are included at the outputs of the oscillating circuit to convert the sinusoidal waveform into square output waveforms.
Inventors
- 👤 Georgios Stamoulis
- 👤 Yibin Ye
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 14:25
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/099; H03B; H03B11/00; H03B11/04; H03B11/10; H03B5/00; H03B5/08; H03B5/12; H03B5/1206; H03B5/1212; H03B5/1228; H03B2200/00; H03B2200/006; H03B2200/0082
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
153 words
An adiabatic waveform generation circuit, comprising: an oscillating circuit generating first and second oscillating outputs: a replenishing circuit generating first and second replenishing outputs coupled to the oscillating circuit, the replenishing circuit comprising: a first pull-up device coupled between a first potential and a first node of the oscillating circuit, a first pull-down device coupled between a second potential and the first node, a second pull-up device coupled between the first potential and a second node of the oscillating circuit, a second pull-down device coupled between the second potential and the second node; a control circuit generating first and second control signals coupled to the replenishing circuit, the control circuit further coupled to one of the first and second oscillating outputs, the control circuit controlling a frequency of oscillation of the oscillating circuit; and an enable input, the oscillating circuit generating the first and second oscillating outputs in response to the enable input.
Claim 2
Dependent Claim
153 words
An adiabatic waveform generation circuit, comprising: an oscillating circuit generating first and second oscillating outputs: a replenishing circuit generating first and second replenishing outputs coupled to the oscillating circuit, the replenishing circuit comprising: a first pull-up device coupled between a first potential and a first node of the oscillating circuit, a first pull-down device coupled between a second potential and the first node, a second pull-up device coupled between the first potential and a second node of the oscillating circuit, a second pull-down device coupled between the second potential and the second node; a control circuit generating first and second control signals coupled to the replenishing circuit, the control circuit further coupled to one of the first and second oscillating outputs, the control circuit controlling a frequency of oscillation of the oscillating circuit; and an enable input, the oscillating circuit generating the first and second oscillating outputs in response to the enable input.
Claim 3
Dependent Claim
180 words
The adiabatic waveform generation circuit described in claim 1 wherein the replenishing circuit further comprises: a first logical-NAND gate having an output coupled to the first pull-up device, the first logical-NAND gate further having first and second inputs coupled to the first control signal and the enable signal respectively; a second logical-NAND gate having first and second inputs coupled to the first control signal and the enable signal respectively; a first inverter having an input coupled to an output of the second logical-NAND gate, the first inverter further having an output coupled to the second pull-down device; a third logical-NAND gate having first and second inputs coupled to the second control signal and the enable signal respectively; a second inverter having an input coupled to an output of the third logical-NAND gate, the second inverter further having an output coupled to the first pull-down device; and a fourth logical-NAND gate having an output coupled to the second pull-up device, the fourth logical-NAND gate further having first and second inputs coupled to the second control signal and the enable signal respectively.
Claim 4
Dependent Claim
197 words
The adiabatic waveform generation circuit described in claim 1 wherein the replenishing circuit further comprises: a first inverter having an input coupled to the enable input; a first logical-NOR gate having an output coupled to the first pull-up device, the first logical-NOR gate further having first and second inputs coupled to the first control signal and an output of the first inverter respectively; a first logical-NAND gate having first and second inputs coupled to the first control signal and the enable signal respectively; a second inverter having an input coupled to an output of the first logical-NAND gate, the second inverter further having an output coupled to the second pull-down device; a second logical-NAND gate having first and second inputs coupled to the second control signal and the enable signal respectively; a third inverter having an input coupled to an output of the second logical-NAND gate, the third inverter further having an output coupled to the first pull-down device; and a second logical-NOR gate having an output coupled to the second pull-up device, the second logical-NOR gate further having first and second inputs coupled to the second control signal and the output of the first inverter respectively.
Claim 5
Dependent Claim
138 words
The adiabatic waveform generation circuit described in claim 1 wherein the replenishing circuit further comprises: a first logical-NAND gate having first and second inputs coupled to the first control signal and the enable signal respectively; a first inverter having an input coupled to an output of the first logical-NAND gate, the first inverter further having an output coupled to the first pull-down device; a second logical-NAND gate having first and second inputs coupled to the second control signal and the enable signal respectively; a second inverter having an input coupled to an output of the second logical-NAND gate, the second inverter further having an output coupled to the second pull-down device; wherein the second replenishing output is further coupled to the first pull-up device; and wherein the first replenishing output is further coupled to the second pull-up device.
Claim 6
Dependent Claim
44 words
The adiabatic waveform generation circuit described in claim 1 wherein the control circuit is further coupled to receive a reference clock signal, the control circuit generating the first and second control signals in response to the reference clock signal and the first oscillating output.
Claim 7
Dependent Claim
102 words
In an adiabatic waveform generation circuit, a method of generating first and second oscillating waveforms, the method comprising the steps of: generating the first and second oscillating waveforms approximately 180 degrees out of phase from one another at first and second oscillating outputs of an oscillation circuit; replenishing the first and second oscillating waveforms with first and second replenishing outputs respectively of a replenishing circuit, the first and second replenishing outputs generated in response to an enable signal; and controlling a frequency of oscillation of the first and second oscillating waveforms with first and second control signals coupled to the replenishing circuit.
Claim 8
Dependent Claim
102 words
In an adiabatic waveform generation circuit, a method of generating first and second oscillating waveforms, the method comprising the steps of: generating the first and second oscillating waveforms approximately 180 degrees out of phase from one another at first and second oscillating outputs of an oscillation circuit; replenishing the first and second oscillating waveforms with first and second replenishing outputs respectively of a replenishing circuit, the first and second replenishing outputs generated in response to an enable signal; and controlling a frequency of oscillation of the first and second oscillating waveforms with first and second control signals coupled to the replenishing circuit.
Claim 9
Dependent Claim
62 words
The method described in claim 6 wherein the step of controlling the frequency of oscillation includes the steps of: generating the first and second control signals with a control circuit in response to one of the first and second oscillating waveforms and a reference clock; and generating the first and second replenishing outputs in response to the first and second control signals.
Claim 10
Dependent Claim
151 words
The method described in claim 7 wherein the step of replenishing the first and second waveforms includes repeating the sequential steps of: gradually coupling the first oscillating output up to a first potential while simultaneously gradually coupling the second oscillating output down to a second potential in response to the first and second control signals; gradually decoupling the first oscillating output from the first potential while simultaneously gradually decoupling the second oscillating output from the second potential in response to the first and second control signals; gradually coupling the first oscillating output down to the second potential while simultaneously gradually coupling the second oscillating output up to the first potential in response to the first and second control signals; and gradually decoupling the first oscillating output from the second potential while simultaneously gradually decoupling the second oscillating output from the first potential in response to the first and second control signals.
Claim 11
Dependent Claim
74 words
The method described in claim 8 wherein the step of gradually coupling the first oscillating output up to the first potential is performed only after the step of-gradually decoupling the first oscillating output from the second potential is substantially completed and the step of gradually coupling the first oscillating output down to the second potential is performed only after the step of decoupling the first oscillating output from the first potential is substantially completed.
Claim 12
Dependent Claim
74 words
An adiabatic waveform generation circuit, comprising: waveform generation means for generating first and second oscillating outputs; replenishing means coupled to the waveform generation means for replenishing the first and second oscillating outputs; control means coupled to the waveform generation means and the replenishing means for controlling a frequency of oscillation of the first and second oscillating outputs; and enabling means for enabling the waveform generation means to generate the first and second oscillating waveforms.
Claim 13
Dependent Claim
74 words
An adiabatic waveform generation circuit, comprising: waveform generation means for generating first and second oscillating outputs; replenishing means coupled to the waveform generation means for replenishing the first and second oscillating outputs; control means coupled to the waveform generation means and the replenishing means for controlling a frequency of oscillation of the first and second oscillating outputs; and enabling means for enabling the waveform generation means to generate the first and second oscillating waveforms.
Claim 14
Dependent Claim
49 words
The adiabatic waveform generation circuit described in claim 10 further comprising a reference clock received by the control means, the control means controlling the frequency of oscillation of the first and second oscillating outputs in response to the reference clock and one of the first and second oscillating outputs.
Claim 15
Dependent Claim
126 words
An adiabatic waveform generation circuit, comprising: an oscillating circuit generating first and second oscillating outputs, the oscillating circuit coupled to an enable input, the oscillating circuit generating the first and second oscillating inputs in response to the enable input; a replenishing circuit generating first and second replenishing outputs coupled to the oscillating circuit; and a control circuit generating first and second control signals coupled to the replenishing circuit, the control circuit further coupled to one of the first and second oscillating outputs, the control circuit controlling a frequency of oscillation of the oscillating circuit, the control circuit coupled to receive a reference clock signal, the control circuit generating the first and second control signals in response to the reference clock signal and the first oscillating output.
Claim 16
Dependent Claim
126 words
An adiabatic waveform generation circuit, comprising: an oscillating circuit generating first and second oscillating outputs, the oscillating circuit coupled to an enable input, the oscillating circuit generating the first and second oscillating inputs in response to the enable input; a replenishing circuit generating first and second replenishing outputs coupled to the oscillating circuit; and a control circuit generating first and second control signals coupled to the replenishing circuit, the control circuit further coupled to one of the first and second oscillating outputs, the control circuit controlling a frequency of oscillation of the oscillating circuit, the control circuit coupled to receive a reference clock signal, the control circuit generating the first and second control signals in response to the reference clock signal and the first oscillating output.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-11-16 | 2002-05-18 | 2002-11-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-11-16 | 2006-05-18 | 2006-11-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-11-16 | 2010-05-18 | 2010-11-17 | $7700.00 | Window Closed / Lapsed |