US5835164A
Expired / Lapsed
US
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Video signal processor
Assignee: Mitsubishi Electric Corp
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Filing: 1995-06-05
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Granted: 1998-11-10
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Expires: 2015-06-05
Abstract
Abstract In a color image display system formed of a monochromatic CRT or like image display device (102) having a screen (103) for display of images and a rotary filter (106) comprising color filter sections (106R, 106G and 106B) of a plurality of colors; image signals are read from memories (130R, 130G, 130B) at a rate higher than they are written in the memories, so as to reduce flickers. The problem of passing of the reading address over the writing address is solved by reading the image signal of prominent color taking a period in which the passing over occurs. High frequency components of other color image signals are extracted and added to the image signal of each color to thereby enhance the definition of the picture.
Inventors
- 👤 Akira Kanai
- 👤 Masaki Yamakawa
- 👤 Shoichi Sugihara
- 👤 Akiko Maeno
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 13:27
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/12; H04N9/16; H04N9/22; H04N9/31; H04N9/3102; H04N9/3111; H04N9/3114; G; G03; G03B; G03B21/00; G03B21/14; G03B21/54; G03B21/56; G03B21/567; H04N9/3179; H04N9/3182; H04N9/79; H04N9/80; H04N9/81
Claims Analysis
Total Claims: 49
Claim 1
Independent Claim
87 words
A video signal processor having a plurality of signal processing circuits respectively receiving a plurality of input color signals, which represent respective color components of a video signal, and producing decoded signals of the respective color components, said video signal processor comprising: means for controlling operation of the signal processing circuits using control clocks having different phases; and means for adding a decoded signal of one of the signal processing circuits and only a high-frequency component of a decoded signal of another of the signal processing circuits.
Claim 2
Dependent Claim
87 words
A video signal processor having a plurality of signal processing circuits respectively receiving a plurality of input color signals, which represent respective color components of a video signal, and producing decoded signals of the respective color components, said video signal processor comprising: means for controlling operation of the signal processing circuits using control clocks having different phases; and means for adding a decoded signal of one of the signal processing circuits and only a high-frequency component of a decoded signal of another of the signal processing circuits.
Claim 3
Dependent Claim
23 words
A video signal processor according to claim 1, wherein said control means shifts the phases of said control clocks by 180° every field.
Claim 4
Dependent Claim
29 words
A video signal processor according to claim 1, wherein said control means uses a plurality of clocks for controlling over the operation of each of said signal processing circuits.
Claim 5
Dependent Claim
123 words
A video signal processors comprising: a common A/D converter for receiving and converting one of the input color signals, which represent respective color components of a video signal, into digital data; means for alternately or sequentially selecting the input color signals and supplying the selected input color signal to said common A/D converter; means for writing the digital data into one of a plurality of memories corresponding to the color component represented by the digital data; means for reading the digital data from the memories and supplying the digital data to D/A converters for the respective color components to produce corresponding decoded signals; and means for adding one of the decoded signals and only a high-frequency component of another of the decoded signals.
Claim 6
Dependent Claim
123 words
A video signal processors comprising: a common A/D converter for receiving and converting one of the input color signals, which represent respective color components of a video signal, into digital data; means for alternately or sequentially selecting the input color signals and supplying the selected input color signal to said common A/D converter; means for writing the digital data into one of a plurality of memories corresponding to the color component represented by the digital data; means for reading the digital data from the memories and supplying the digital data to D/A converters for the respective color components to produce corresponding decoded signals; and means for adding one of the decoded signals and only a high-frequency component of another of the decoded signals.
Claim 7
Dependent Claim
23 words
A video signal processor according to claim 4, wherein said selecting means selects said input color signals in accordance with A/D conversion clocks.
Claim 8
Dependent Claim
80 words
A video signal processor according to claim 4, further comprising: delay means for delaying at least one of the input color signals so that a phase difference exists between the input color signals; and wherein the selecting means selects one of the input color signals output from the delay means; and said writing means writes the digital data into the corresponding memories using control clocks having the same phase difference as the input color signals output from the delay means.
Claim 9
Dependent Claim
81 words
A video signal processor, comprising: A/D-converting means for sampling and A/D-converting input color signals, which represent respective color components of a video signal, to produce digital data corresponding to the input color signals; at least one memory for storing the digital data; D/A-converting means for D/A-converting digital data read from the memory to produce decoded signals of the respective component colors; and means for adding one of the decoded signals and only a high-frequency component of another of the decoded signals.
Claim 10
Dependent Claim
81 words
A video signal processor, comprising: A/D-converting means for sampling and A/D-converting input color signals, which represent respective color components of a video signal, to produce digital data corresponding to the input color signals; at least one memory for storing the digital data; D/A-converting means for D/A-converting digital data read from the memory to produce decoded signals of the respective component colors; and means for adding one of the decoded signals and only a high-frequency component of another of the decoded signals.
Claim 11
Dependent Claim
18 words
A video signal processor according to claim 7, wherein the A/D-converting means comprises a plurality of A/D converters.
Claim 12
Dependent Claim
36 words
A video signal processor according to claim 8, further comprising means for controllig the operation of the A/D converters using control clocks having different phases to vary phases of sampling points of the input color signals.
Claim 13
Dependent Claim
23 words
A video signal processor according to claim 9, wherein said control means shifts the phases of said control clocks by 180° every field.
Claim 14
Dependent Claim
34 words
A video signal processor according to claim 9, wherein said control means uses a plurality of clocks to control each of the A/D converters in order to increase a number of the sampling points.
Claim 15
Dependent Claim
17 words
A video signal processor according to claim 7, wherein said A/D-converting means comprises a single A/D converter.
Claim 16
Dependent Claim
37 words
A video signal processor according to claim 12, further comprising: means for alternately or sequentially selecting one of the input color signals and supplying the selected input color signal to said A/D converter to produce digital data.
Claim 17
Dependent Claim
71 words
A video signal processor according to claim 12, further comprising: means for delaying at least one of the input color signals so that a phase difference exists between the input color signals; and means for alternately or sequentially selecting the input color signals at least one of which having been delayed by said delay means, and supplying the selected input color signal to said A/D converter to produce the digital data.
Claim 18
Dependent Claim
28 words
A video signal processor according to claim 7, wherein said D/A-converting means comprises a single D/A converter for D/A-converting the input color signals of a plurality of colors.
Claim 19
Dependent Claim
30 words
A video signal processor according to claim 7, wherein the D/A-converting means comprises a single D/A converter for D/A-converting the digital data read from the memory in a field-sequential manner.
Claim 20
Dependent Claim
149 words
A video signal processor for A/D-converting an input color signal using a control clock, which is phase-shifted every field by a predetermined phase, to produce digital data, and writing the digital data into a memory, and reading the digital data from the memory at a rate n times (n>1) the rate of writing; the reading of one field being performed repeatedly while writing of one field is performed once; the memory for the input color signal has first and second areas, each having a capacity of one field of said digital data; said video signal processor comprising: means for writing the digital data of respective fields alternately into the first area and the second area; and means for controlling the reading from the memory such that the digital data read in one field of a reading operation consist of digital data written in one field of a writing operation.
Claim 21
Dependent Claim
149 words
A video signal processor for A/D-converting an input color signal using a control clock, which is phase-shifted every field by a predetermined phase, to produce digital data, and writing the digital data into a memory, and reading the digital data from the memory at a rate n times (n>1) the rate of writing; the reading of one field being performed repeatedly while writing of one field is performed once; the memory for the input color signal has first and second areas, each having a capacity of one field of said digital data; said video signal processor comprising: means for writing the digital data of respective fields alternately into the first area and the second area; and means for controlling the reading from the memory such that the digital data read in one field of a reading operation consist of digital data written in one field of a writing operation.
Claim 22
Dependent Claim
63 words
A video signal processor according to claim 17, wherein said controlling means controls a timing of commencement of the reading of the digital data of each field such that the reading of the digital data of each field will not proceed to the end of the field until or concurrent with the end of the writing of the digital data of each field.
Claim 23
Dependent Claim
64 words
A video signal processor according to claim 1, wherein at least one of the video signal processing circuits comprises: an A/D converter for sampling and A/D converting one of the input color signals into digital data; a memory for storing the digital data; and a D/A converter for D/A converting the digital data stored in the memory to produce one of the decoded signals.
Claim 24
Dependent Claim
56 words
A video signal processor according to claim 19, further comprising: a low pass filter for low pass filtering one of the decoded signals; and wherein said adding means adds the one of the decoded signals filtered by the low pass filter to said high-frequency component of a decoded signal of another of the signal processing circuits.
Claim 25
Dependent Claim
56 words
A video signal processor according to claim 1, further comprising: a low pass filter for low pass filtering one of the decoded signals; and wherein said adding means adds the one of the decoded signals filtered by the low pass filter to said high-frequency components of a decoded signal of another of the signal processing circuits.
Claim 26
Dependent Claim
38 words
A video signal processor according to claim 1, further comprising: means for alternately or sequentially selecting the selected input color signals; and a common A/D converter for receiving and converting the selected input color signal into digital data.
Claim 27
Dependent Claim
35 words
A video signal processor according to claim 7, wherein the A/D-converting means comprises an A/D converter corresponding to each color component for A/D converting one of the input color signals associated with that color component.
Claim 28
Dependent Claim
27 words
A video signal processor according to claim 7, further comprising: a memory corresponding to each color component for storing the digital data associated with that color component.
Claim 29
Dependent Claim
68 words
A video signal processor according to claim 7, further comprising: a plurality of memories, each memory corresponding to one of the color components and storing the digital data associated with that color component; writing means for controlling writing of the digital data, output by the A/D-converting means, into the memories; and reading means for controlling reading out of the digital data from the memories to the D/A-converting means.
Claim 30
Dependent Claim
51 words
A video signal processor according to claim 13, further comprising: a plurality of memories, each memory corresponding to one of the color components and storing the digital data associated with that color component; and writing means for controlling writing of the digital data, output by the A/D-converting means, into the memories.
Claim 31
Dependent Claim
64 words
A video signal processor according to claim 14, further comprising: a plurality of memories, each memory corresponding to one of the color components and storing the digital data associated with that color component; writing means for controlling writing of the digital data, output by the A/D-converting means, into the memories based on control clocks having a same phase difference as the input color signals.
Claim 32
Dependent Claim
52 words
A video signal processor according to claim 16, further comprising: a plurality of memories, each memory corresponding to one of the color components and storing the digital data associated with that color component; and wherein the single D/A converter D/A converts the digital data read from the memories in a field-sequential manner.
Claim 33
Dependent Claim
192 words
A video signal processor, comprising: A/D converting means for receiving and converting input color signals, which each represent a color component of a video signal, into digital data based on a control clock, which is phase-shifted every field by a predetermined phase; a memory, corresponding to each color component, for storing the digital data corresponding to a same color component, the digital data being written into the memory at a first rate and being read from the memory at a second rate which is n times the first rate where n in an integer greater than one, the reading of one field being performed repeatedly while a field is written once, the memory including a first and second area, the first and second area having a capacity of one field of digital data; means for controlling the writing of the digital data into each memory so that fields of the digital data are alternately written into the first and second areas, and for controlling the reading of the digital data from each memory such that each field of the digital data read from a memory is digital data written as one field.
Claim 34
Dependent Claim
192 words
A video signal processor, comprising: A/D converting means for receiving and converting input color signals, which each represent a color component of a video signal, into digital data based on a control clock, which is phase-shifted every field by a predetermined phase; a memory, corresponding to each color component, for storing the digital data corresponding to a same color component, the digital data being written into the memory at a first rate and being read from the memory at a second rate which is n times the first rate where n in an integer greater than one, the reading of one field being performed repeatedly while a field is written once, the memory including a first and second area, the first and second area having a capacity of one field of digital data; means for controlling the writing of the digital data into each memory so that fields of the digital data are alternately written into the first and second areas, and for controlling the reading of the digital data from each memory such that each field of the digital data read from a memory is digital data written as one field.
Claim 35
Dependent Claim
43 words
A video signal processor according to claim 29, wherein the controlling means controls the reading and writing of the digital data from each memory such that an address for reading the digital data does not pass-over an address for writing the digital data.
Claim 36
Dependent Claim
51 words
A video signal processor according to claim 28, wherein the controlling means controls the reading and writing of the digital data from each memory such that a currently-read field of the digital data will be completely read before or concurrently with completion of writing the currently-read field of the digital data.
Claim 37
Dependent Claim
203 words
A video signal processor, comprising: A/D converting means for receiving and converting input color signals, which each represent a color component of a video signal, into digital data based on a first control clock, which is phase-shifted every field by a predetermined phase; a memory, corresponding to each color component, for storing the digital data corresponding to a same color component, the digital data being written into the memory at a first rate based on a writing control clock and being read from the memory at a second rate, which is n times the first rate where n in an integer greater than one, based on a reading control clock, the reading of one field being performed repeatedly while a field is written once; D/A converting means for D/A converting the digital data read from each memory to produce decoded signals based on a second control clock; and means for shifting the phases of the second and reading control clocks so as to be identical to a phase of the first control clock during a period in which the digital data of one field is being read and in which the writing of the digital data of the same field is also written.
Claim 38
Dependent Claim
203 words
A video signal processor, comprising: A/D converting means for receiving and converting input color signals, which each represent a color component of a video signal, into digital data based on a first control clock, which is phase-shifted every field by a predetermined phase; a memory, corresponding to each color component, for storing the digital data corresponding to a same color component, the digital data being written into the memory at a first rate based on a writing control clock and being read from the memory at a second rate, which is n times the first rate where n in an integer greater than one, based on a reading control clock, the reading of one field being performed repeatedly while a field is written once; D/A converting means for D/A converting the digital data read from each memory to produce decoded signals based on a second control clock; and means for shifting the phases of the second and reading control clocks so as to be identical to a phase of the first control clock during a period in which the digital data of one field is being read and in which the writing of the digital data of the same field is also written.
Claim 39
Dependent Claim
21 words
A video signal processor according to claim 31, wherein the writing control clock is the same as the first control clock.
Claim 40
Dependent Claim
44 words
A video signal processor according to claim 1, wherein the adding means adds only a low-frequency component of a decoded signal of one of the signal processing circuits and only a high-frequency component of a decoded signal of another of the signal processing circuits.
Claim 41
Dependent Claim
34 words
A video signal processor according to claim 4, wherein the adding means adds only a low-frequency component of one of the decoded signals and only a high-frequency component of another of the decoded signals.
Claim 42
Dependent Claim
34 words
A video signal processor according to claim 7, wherein the adding means adds only a low-frequency component of one of the decoded signals and only a high-frequency component of another of the decoded signals.
Claim 43
Dependent Claim
73 words
A video signal processor according to claim 21, further comprising: a high pass filter for high pass filtering one of the decoded signals; a switch means for alternately and sequentially supplying a first and second decoded signal to the high pass filter; and wherein the low pass filter low pass filters one of the first and second decoded signals; and the adding means adds output from the low pass and high pass filters.
Claim 44
Dependent Claim
57 words
A video signal processor according to claim 4, further comprising: a low pass filter for low pass filtering one of the decoded signals; and wherein said adding means adds the one of the decoded signals filtered by the low pass filter and only a high-frequency component of a decoded signal of another of the signal processing circuits.
Claim 45
Dependent Claim
73 words
A video signal processor according to claim 38, further comprising: a high pass filter for high pass filtering one of the decoded signals; a switch means for alternately and sequentially supplying a first and second decoded signal to the high pass filter; and wherein the low pass filter low pass filters one of the first and second decoded signals; and the adding means adds output from the low pass and high pass filters.
Claim 46
Dependent Claim
57 words
A video signal processor according to claim 7, further comprising: a low pass filter for low pass filtering one of the decoded signals; and wherein said adding means adds the one of the decoded signals filtered by the low pass filter and only a high-frequency component of a decoded signal of another of the signal processing circuits.
Claim 47
Dependent Claim
73 words
A video signal processor according to claim 40, further comprising: a high pass filter for high pass filtering one of the decoded signals; a switch means for alternately and sequentially supplying a first and second decoded signal to the high pass filter; and wherein the low pass filter low pass filters one of the first and second decoded signals; and the adding means adds output from the low pass and high pass filters.
Claim 48
Dependent Claim
45 words
A video signal processor according to claim 29, wherein the controlling means controls reading of the digital data from each memory such that the digital data of a field currently being written at least starts to be read prior to completion of the writing operation.
Claim 49
Dependent Claim
45 words
A video signal processor according to claim 17, wherein the controlling means controls reading of the digital data from each memory such that the digital data of a field currently being written at least starts to be read prior to completion of the writing operation.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-11-09 | 2002-05-11 | 2002-11-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-11-09 | 2006-05-11 | 2006-11-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-11-09 | 2010-05-11 | 2010-11-10 | $7700.00 | Window Closed / Lapsed |