US5828897A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Hybrid processor and method for executing incrementally upgraded software
Assignee: Raytheon Co
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Filing: 1996-12-19
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Granted: 1998-10-27
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Expires: 2016-12-19
Abstract
Abstract Computer apparatus having a first processor that runs legacy software implemented using a first instruction set, and a second processor that runs new or updated software using a second instruction set. An operand memory is coupled to the first and second processors and stores shared operands in a native representation of the first instruction set. The second instruction set has an extended address space which is used to permit access by the new or updated software to the shared operands. To achieve this, the second processor has a software-implemented object request broker and a reference repository that contains information regarding the location and format of shared operands. When the new or updated software needs access to a shared operand in the operand memory, the nor or updated software invokes an object adapter for the type of operand being accessed, which in turn invokes the object request broker in order to obtain information from the reference repository, enabling the object adapter to locate and reformat the shared operand 24 as required by the new or updated application software. Methods that permit access to shared operands by the software that runs on both processors are also disclosed.
Inventors
- 👤 Steven A. Kirsch
- 👤 Dwight J. Mellema
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 06:55
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3824; G06F9/3885
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
187 words
Computer apparatus comprising: a first processor comprising legacy software implemented using a native instruction set of a first instruction set architecture; a second processor comprising new software implemented using a second instruction set architecture having an extended instruction set; an operand memory coupled to the first processor and second processor by way of a local bus, that stores shared operands using a native representation of an instruction set architecture of the first processor; an interface circuit coupled to the local bus that interfaces the second processor and the first processor to the operand memory; and wherein the second processor further comprises an object adapter, an object request broker and a reference repository that contains information regarding the location and format of the shared operands in the operand memory, and wherein the object adapter is called by the new software when access to a shared operand is required by the new software, and wherein the object adapter by way of the object request broker accesses the reference repository to obtain information which allows the object adapter to provide access to the corresponding shared operand in the operand memory.
Claim 2
Dependent Claim
187 words
Computer apparatus comprising: a first processor comprising legacy software implemented using a native instruction set of a first instruction set architecture; a second processor comprising new software implemented using a second instruction set architecture having an extended instruction set; an operand memory coupled to the first processor and second processor by way of a local bus, that stores shared operands using a native representation of an instruction set architecture of the first processor; an interface circuit coupled to the local bus that interfaces the second processor and the first processor to the operand memory; and wherein the second processor further comprises an object adapter, an object request broker and a reference repository that contains information regarding the location and format of the shared operands in the operand memory, and wherein the object adapter is called by the new software when access to a shared operand is required by the new software, and wherein the object adapter by way of the object request broker accesses the reference repository to obtain information which allows the object adapter to provide access to the corresponding shared operand in the operand memory.
Claim 3
Dependent Claim
102 words
The apparatus of claim 1 wherein the first processor comprises a second object adapter, a second object request broker and reference depository that contains information regarding the location and format of the shared operands in the operand memory, and wherein the second object adapter is called by the legacy software when access to a shared operand is required by the legacy software, and wherein the second object adapter by way of the second object request broker accesses the second reference repository to obtain information which allows the second object adapter to provide access to the corresponding shared operand from the operand memory.
Claim 4
Independent Claim
181 words
A method for use with a computer system containing first and second processors that run software that use different instruction sets, which method permits access to shared operands by the software that runs on both processors, said method comprising the steps of: storing shared operands in an operand memory using a native representation of an instruction set architecture of the first processor; storing a reference repository in the second processor that contains information regarding the location and format of the shared operands in the operand memory; providing an object request broker on the second processor to provide an interface between the software that runs on the second processor and the reference repository; and when access to a shared operand is required by the software that runs on the second processor, causing the software to access an appropriate object adapter which in turn uses the object request broker to access information stored in the reference repository corresponding to the requested shared operand, which results in the successful accessing of the requested shared operand from the operand memory for use by the software.
Claim 5
Independent Claim
181 words
A method for use with a computer system containing first and second processors that run software that use different instruction sets, which method permits access to shared operands by the software that runs on both processors, said method comprising the steps of: storing shared operands in an operand memory using a native representation of an instruction set architecture of the first processor; storing a reference repository in the second processor that contains information regarding the location and format of the shared operands in the operand memory; providing an object request broker on the second processor to provide an interface between the software that runs on the second processor and the reference repository; and when access to a shared operand is required by the software that runs on the second processor, causing the software to access an appropriate object adapter which in turn uses the object request broker to access information stored in the reference repository corresponding to the requested shared operand, which results in the successful accessing of the requested shared operand from the operand memory for use by the software.
Claim 6
Dependent Claim
156 words
The method of claim 3 which further comprises the steps of: storing shared operands in an operand memory using a native representation of an instruction set architecture of the second processor; storing a second reference repository in the first processor that contains information regarding the location and format of the shared operands in the operand memory; providing a second object request broker on the first processor to provide an interface between the software that runs on the first processor and the second reference repository; and when access to a shared operand is required by the software that runs on the first processor, causing the software to access an appropriate object adapter which in turn uses the second object request broker to access information stored in the second reference repository corresponding to the requested shared operand, which results in the successful accessing of the requested shared operand from the operand memory 14 for use by the software.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-10-26 | 2002-04-27 | 2002-10-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-10-26 | 2006-04-27 | 2006-10-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-10-26 | 2010-04-27 | 2010-10-27 | $7700.00 | Window Closed / Lapsed |