PWN controller use with open loop flyback type DC to AC converter

Claim 2

A controller suitable for controlling an open loop flyback DC to AC converter circuit, said circuit including a transformer having a primary and a secondary, said controller comprising: sampling means for generating a digital number representative of the magnitude of a source of DC electrical power; sine generator means for generating a digital representation of a sinusoidal waveform; processing means for determining the duty cycle of a pulse width modulated (PWM) signal in accordance with the following equation ##EQU28## wherein D=duty cycle of PWM signal N=turns ratio of said transformer V IN =voltage level of said source of DC electrical power V OUT =digital representation of a sinusoidal waveform; and pulse width modulation means for generating said PWM signal in response to the duty cycle generated by said processing means.

Claim 3

The controller according to claim 1, wherein said sampling means comprises A/D converter means.

Claim 4

The controller according to claim 1, wherein said sampling means comprises: comparator means for comparing the magnitude of said source of DC electrical power with a converter signal; a counter responsive to the output of said comparator means; converter means for generating said converter signal in response to the output of said counter; and a latch for periodically latching the output of said counter.

Claim 5

The controller according to claim 3, wherein said comparator means comprises: a voltage divider coupled to said source of DC electrical power; filter means for low pass filtering said converter signal; and a comparator for comparing the output of said voltage divider and the output of said filter means and generating an compare signal therefrom.

Claim 6

The controller according to claim 1, wherein said sine generator means comprises counting means coupled to look up table means.

Claim 7

The controller according to claim 1, wherein said sine generator means comprises synchronous state machine means.

Claim 8

The controller according to claim 1, wherein said processing means comprises: a multiplier for generating the product N·V IN ; an adder for generating the sum N·V IN +V OUT ; and a divider for dividing V OUT by said sum.

Claim 9

The controller according to claim 1, further comprising synchronization means for generating a sequence of pulses in response to both the positive and negative zero crossings of the output sine wave.

Claim 10

The controller according to claim 1, further comprising overcurrent protection means operative to reduce the duty cycle of said PWM signal in response to an overcurrent condition in the output of said circuit.

Claim 11

The controller according to claim 1, further comprising overcurrent protection means operative to shut down said pulse width modulation means in response to a severe current overload or short circuit applied to the output of said circuit.

Claim 12

The controller according to claim 1, further comprising bridge control means for generating a bridge control signal for converting a half wave sine function to a full wave sine function, said bridge control signal having the same frequency as the sine wave output by said circuit.

Claim 13

The controller according to claim 1, further comprising buffer means coupled to the output of said pulse width modulation means, said buffer means for generating an output PWM signal with suitable drive and load characteristics.

Claim 14

A controller for controlling the operation of a DC to AC converter circuit, said circuit connected to a source of DC electrical power and having an open loop flyback topology including a transformer having a primary winding and a secondary winding, a switch coupled to said primary winding and an output bridge circuit, said controller comprising: sampling means for generating a digital representation of the voltage level of said source of DC electrical power; sine generator means for generating a digital representation of a sinusoidal waveform; processing means for determining the duty cycle of a pulse width modulated (PWM) signal in accordance with the following equation ##EQU29## wherein D=duty cycle of PWM signal N=turns ratio of said transformer V IN =voltage level of said source of DC electrical power V OUT =digital representation of a sinusoidal waveform; pulse width modulation means for generating said PWM signal in response to the duty cycle generated by said processing means, said PWM signal output by said controller and input to said switch; and bridge control means for generating a bridge control signal output by said controller and input to said output bridge circuit, said output bridge circuit operative to convert a half wave sine function to a full wave sine function subsequently output by said circuit.

Claim 15

A controller for controlling the operation of a DC to AC converter circuit, said circuit connected to a source of DC electrical power and having an open loop flyback topology including a transformer having a primary winding and a secondary winding, a switch coupled to said primary winding and an output bridge circuit, said controller comprising: sampling means for generating a digital representation of the voltage level of said source of DC electrical power; sine generator means for generating a digital representation of a sinusoidal waveform; processing means for determining the duty cycle of a pulse width modulated (PWM) signal in accordance with the following equation ##EQU29## wherein D=duty cycle of PWM signal N=turns ratio of said transformer V IN =voltage level of said source of DC electrical power V OUT =digital representation of a sinusoidal waveform; pulse width modulation means for generating said PWM signal in response to the duty cycle generated by said processing means, said PWM signal output by said controller and input to said switch; and bridge control means for generating a bridge control signal output by said controller and input to said output bridge circuit, said output bridge circuit operative to convert a half wave sine function to a full wave sine function subsequently output by said circuit.

Claim 16

The controller according to claim 13, further comprising overcurrent protection means operative to reduce the duty cycle of said PWM signal in response to an overcurrent condition in the output of said circuit.

Claim 17

The controller according to claim 13, further comprising overcurrent protection means operative to shut down said pulse width modulation means in response to a severe current overload or short circuit applied to the output of said circuit.

Claim 18

The controller according to claim 14, wherein said overcurrent protection means comprises: pulse counting means for counting pulses in response to the current in said primary exceeding a predetermined threshold and generating UP and DOWN signals in accordance thereto; up/down counter means for incrementing and decrementing a counter in response to said UP and DOWN signals, respectively; wherein said processing means is adapted to receive and process the output of said up/down counter such that the duty cycle of said PWM signal is adjusted in accordance therewith.

Claim 19

The controller according to claim 13, wherein said sampling means comprises A/D converter means.

Claim 20

The controller according to claim 13, wherein said sampling means comprises: comparator means for comparing the magnitude of said source of DC electrical power with a converter signal; a counter responsive to the output of said comparator means; converter means for generating said converter signal in response to the output of said counter; and a latch for periodically latching the output of said counter.

Claim 21

The controller according to claim 18, wherein said comparator means comprises: a voltage divider coupled to said source of DC electrical power; filter means for low pass filtering said converter signal; and a comparator for comparing the output of said voltage divider and the output of said filter means and generating an compare signal therefrom.

Claim 22

The controller according to claim 13, wherein said sine generator means comprises counting means coupled to look up table means.

Claim 23

The controller according to claim 13, wherein said sine generator means comprises synchronous state machine means.

Claim 24

The controller according to claim 13, wherein said processing means comprises: a multiplier for generating the product N·V IN ; an adder for generating the sum N·V IN +V OUT ; and a divider for dividing V OUT by said sum.

Claim 25

The controller according to claim 13, further comprising synchronization means for generating a sequence of pulses in response to both the positive and negative zero crossings of the output sine wave.

Claim 26

The controller according to claim 13, further comprising buffer means coupled to the output of said pulse width modulation means, said buffer means for generating an output PWM signal with suitable drive and load characteristics.

Claim 29

The method according to claim 25, wherein said step of generating a digital number comprises: comparing the magnitude of said source of DC electrical power with a converter signal and maintaining a count in response thereto; generating said converter signal in response to the magnitude of said count; and periodically latching the value of said count.

Claim 30

The method according to claim 26, wherein said step of comparing comprises: dividing said source of DC electrical power to generate a divided voltage; low pass filtering said converter signal and generating a filtered signal therefrom; and comparing said divided voltage with and said filtered signal and generating a compare signal therefrom.

Claim 31

The method according to claim 25, wherein said step of determining comprises: generating the product N·V IN ; generating the sum N·V IN +V OUT ; and dividing V OUT by said sum.

Claim 32

The method according to claim 25, further comprising the step of generating a sequence of pulses in response to both the positive and negative zero crossings of the output sine wave.

Claim 33

The method according to claim 25, further comprising the step of reducing the duty cycle of said PWM signal in response to an overcurrent condition in the output of said circuit.

Claim 34

The method according to claim 25, further comprising the step of suspending the generation of said PWM signal in response to a severe current overload or short circuit applied to the output of said circuit.

Claim 35

The method according to claim 25, further comprising the step converting a half wave sine function to a fill wave sine function.

Claim 36

The method according to claim 25, further comprising the step of generating an output PWM signal with suitable drive and load characteristics.

Claim 39

The method according to claim 34, wherein said step of generating a digital number comprises: comparing the magnitude of said source of DC electrical power with a converter signal and maintaining a count in response thereto; generating said converter signal in response to the magnitude of said count; and periodically latching the value of said count.

Claim 40

The method according to claim 35, wherein said step of comparing comprises: dividing said source of DC electrical power to generate a divided voltage; low pass filtering said converter signal and generating a filtered signal therefrom; and comparing said divided voltage with and said filtered signal and generating a compare signal therefrom.

Claim 41

The method according to claim 34, wherein said step of determining comprises: generating the product N·V IN ; generating the sum N·V IN +V OUT ; and dividing V OUT by said sum.

Claim 42

The method according to claim 34, further comprising the step of reducing the duty cycle of said PWM signal in response to an overcurrent condition in the output of said circuit.

Claim 43

The method according to claim 34, further comprising the step of suspending the generation of said PWM signal in response to a severe current overload or short circuit applied to the output of said circuit.

Claim 44

The method according to claim 34, further comprising the step of generating an output PWM signal with suitable drive and load characteristics.