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US5822239A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of writing data to a single transistor type ferroelectric memory

Assignee: Tokyo Institute of Technology
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Filing: 1997-07-10
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Granted: 1998-10-13
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Expires: 2017-07-10
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Abstract

Abstract The invention is directed to a writing method to effectively suppress inter-cell interference when writing data to a single transistor type ferroelectric memory. When V is a writing voltage, stripe-like conducting electrodes are row electrodes, and semiconductor stripes are column electrodes, then the writing method includes a first procedure and a successive second procedure based on V/3 rule. In the first procedure, when a voltage of +V is applied to the row electrode of the cell being observed, while a voltage of zero is applied to the column electrode, and voltages of +V/3 are applied to the other row electrodes, and voltages of +(2/3)V are applied to the other column electrodes, then in the second procedure, a voltage of zero is applied to the row electrode of the cell being observed, while a voltage of +V/3 is applied to the column electrode, and voltages of +V/3 are applied to the other row electrodes, and voltages of zero are applied to the other column electrodes. In the first procedure, when a voltage of -V is applied to the row electrode of the cell being observed, while a voltage of zero is applied to the column electrode, and voltages of -V/3 are applied to the other row electrodes, and voltages of -(2/3)/V are applied to the other column electrodes, then in the second procedure, a voltage of zero is applied to the row electrode of the cell being observed, while a voltage of -V/3 is applied to the column electrode, and voltages of -V/3 are applied to the other row electrodes, and voltages of zero are applied to the other column electrodes.

Inventors

  • 👤 Hiroshi Ishihara
  • 👤 Eisuke Tokumitsu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 20:46
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/24; G11C11/22; G11C11/223

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 365 words
A method of writing data to a single transistor type ferroelectric memory, wherein in the writing of data to a single transistor type ferroelectric memory having a plurality of single crystal semiconductor thin films of mutually parallel stripe-like pnp or npn structure formed in columns on an insulated substrate, a ferroelectric thin film deposited thereon so as to cover at least the semiconductor stripe structure, and a plurality of mutually parallel stripe-like conducting electrodes deposited on top of this layer in a direction approximately perpendicular to the plurality of stripe-like semiconductor thin films, and the transistors formed at the intersections of the semiconductor stripes and the stripe-like conducting electrodes as respective single memory cells, then when V is the writing voltage, the stripe-like conducting electrodes are row electrodes, and the semiconductor stripes are column electrodes, said writing method includes a first procedure and a successive second procedure based on V/3 rule, comprising: in said first procedure, when a voltage of +V is applied to the row electrode of the cell being observed, while a voltage of zero is applied to the column electrode, and voltages of +V/3 are applied to the other row electrodes, and voltages of +(2/3)V are applied to the other column electrodes, then in said second procedure, a voltage of zero is applied to the row electrode of the cell being observed, while a voltage of +V/3 is applied to the column electrode, and voltages of +V/3 are applied to the other row electrodes, and voltages of zero are applied to the other column electrodes, and in said first procedure, when a voltage of -V is applied to the row electrode of the cell being observed, while a voltage of zero is applied to the column electrode, and voltages of -V/3 are applied to the other row electrodes, and voltages of -(2/3)V are applied to the other column electrodes, then in said second procedure, a voltage of zero is applied to the row electrode of the cell being observed, while a voltage of -V/3 is applied to the column electrode, and voltage of -V/3 are applied to the other row electrodes, and voltages of zero are applied to the other column electrodes.
Claim 2
Independent Claim 365 words
A method of writing data to a single transistor type ferroelectric memory, wherein in the writing of data to a single transistor type ferroelectric memory having a plurality of single crystal semiconductor thin films of mutually parallel stripe-like pnp or npn structure formed in columns on an insulated substrate, a ferroelectric thin film deposited thereon so as to cover at least the semiconductor stripe structure, and a plurality of mutually parallel stripe-like conducting electrodes deposited on top of this layer in a direction approximately perpendicular to the plurality of stripe-like semiconductor thin films, and the transistors formed at the intersections of the semiconductor stripes and the stripe-like conducting electrodes as respective single memory cells, then when V is the writing voltage, the stripe-like conducting electrodes are row electrodes, and the semiconductor stripes are column electrodes, said writing method includes a first procedure and a successive second procedure based on V/3 rule, comprising: in said first procedure, when a voltage of +V is applied to the row electrode of the cell being observed, while a voltage of zero is applied to the column electrode, and voltages of +V/3 are applied to the other row electrodes, and voltages of +(2/3)V are applied to the other column electrodes, then in said second procedure, a voltage of zero is applied to the row electrode of the cell being observed, while a voltage of +V/3 is applied to the column electrode, and voltages of +V/3 are applied to the other row electrodes, and voltages of zero are applied to the other column electrodes, and in said first procedure, when a voltage of -V is applied to the row electrode of the cell being observed, while a voltage of zero is applied to the column electrode, and voltages of -V/3 are applied to the other row electrodes, and voltages of -(2/3)V are applied to the other column electrodes, then in said second procedure, a voltage of zero is applied to the row electrode of the cell being observed, while a voltage of -V/3 is applied to the column electrode, and voltage of -V/3 are applied to the other row electrodes, and voltages of zero are applied to the other column electrodes.
Claim 3
Dependent Claim 28 words
A method of writing data to a single transistor type ferroelectric memory, according to claim 1, wherein said single crystal semiconductor thin film is silicon crystal thin film.
Claim 4
Dependent Claim 26 words
A method of writing data to a single transistor type ferroelectric memory, according to claim 1, wherein said stripe-like conducting electrode is a stripe-like metal electrode.

References Cited (Backward Citations)

JPH0668288A Cited
US5666305A Cited
JPH0731705A Cited

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