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US5821919A Expired / Lapsed US ⏱️ 0.0 years remaining

Apparatus for table-driven conversion of pixels from YVU to RGB format

Assignee: Intel Corp
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Filing: 1997-03-27
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Granted: 1998-10-13
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Expires: 2017-03-27
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Abstract

Abstract An apparatus for converting digital video pixels from YVU format to RGB format includes first, second and third registers each of which is coupled to computer memory by a data bus. The computer memory has a plurality of tables and a plurality of YVU pixels stored therein. A controller is coupled to the registers and to the computer memory by the data bus. The controller converts pixels in YVU format to RGB format by performing a plurality of table look-up operations on the YVU pixels.

Inventors

  • 👤 Rohan Coelho

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 20:10
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/02; G09G5/06

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 434 words
An apparatus for converting digital video pixels from YVU format to RGB format, comprising: (a) a first data register, a second data register, and a third data register; (b) computer memory coupled to said first, second and third data registers by a data bus, said computer memory having a plurality of tables stored therein, said computer memory further having a pixel stored therein in YVU format, said YVU pixel having separate Y, V, and U components; and (c) a controller coupled to said first, second and third data registers and to said computer memory by said data bus, wherein: said controller loads said first, second and third data registers with said Y, V, and U components, and said controller retrieves values from said plurality of stored tables and said controller generates values representing R, G, and B components of a digital video pixel corresponding to said Y, V, U pixel by accessing said stored tables using said Y, V and U components as indices; wherein said controller: (i) loads said Y component into said first data register; (ii) loads said V component into said second data register; (iii) looks-up in a first table the value of said loaded second data register to obtain a first result and loads the first result into said third data register; (iv) looks-up in a second table the sum of said loaded first data register and said loaded third data register to obtain a second result; (v) looks-up in a third table the value of said loaded second data register to obtain a third result and loads said third data register with the third result; (vi) reloads said second data register with said U component; (vii) looks-up in a fourth table the value of said reloaded second data register to obtain a fourth result and loads the sum of said fourth result and said third data register as loaded by said controller into said third data register; (viii) looks-up in a fifth table the sum of said loaded first data register and said third data register as loaded by said controller to obtain a fifth result; (ix) looks-up in a sixth table the value of said reloaded second data register to obtain a sixth result and loads the sixth result into said third data register; and (x) looks-up in a seventh table the sum of said loaded first data register and said third data register as loaded by said controller to obtain a seventh result; wherein the second, fifth and seventh results respectively represent R, G, and B components of a digital video pixel corresponding to said YVU pixel.
Claim 2
Independent Claim 434 words
An apparatus for converting digital video pixels from YVU format to RGB format, comprising: (a) a first data register, a second data register, and a third data register; (b) computer memory coupled to said first, second and third data registers by a data bus, said computer memory having a plurality of tables stored therein, said computer memory further having a pixel stored therein in YVU format, said YVU pixel having separate Y, V, and U components; and (c) a controller coupled to said first, second and third data registers and to said computer memory by said data bus, wherein: said controller loads said first, second and third data registers with said Y, V, and U components, and said controller retrieves values from said plurality of stored tables and said controller generates values representing R, G, and B components of a digital video pixel corresponding to said Y, V, U pixel by accessing said stored tables using said Y, V and U components as indices; wherein said controller: (i) loads said Y component into said first data register; (ii) loads said V component into said second data register; (iii) looks-up in a first table the value of said loaded second data register to obtain a first result and loads the first result into said third data register; (iv) looks-up in a second table the sum of said loaded first data register and said loaded third data register to obtain a second result; (v) looks-up in a third table the value of said loaded second data register to obtain a third result and loads said third data register with the third result; (vi) reloads said second data register with said U component; (vii) looks-up in a fourth table the value of said reloaded second data register to obtain a fourth result and loads the sum of said fourth result and said third data register as loaded by said controller into said third data register; (viii) looks-up in a fifth table the sum of said loaded first data register and said third data register as loaded by said controller to obtain a fifth result; (ix) looks-up in a sixth table the value of said reloaded second data register to obtain a sixth result and loads the sixth result into said third data register; and (x) looks-up in a seventh table the sum of said loaded first data register and said third data register as loaded by said controller to obtain a seventh result; wherein the second, fifth and seventh results respectively represent R, G, and B components of a digital video pixel corresponding to said YVU pixel.
Claim 3
Dependent Claim 27 words
The apparatus of claim 1, further comprising a fourth data register for storing pointer information corresponding to the address of said Y component in said computer memory.
Claim 4
Dependent Claim 21 words
The apparatus of claim 2, further comprising a fifth data register for storing information representative of said V and U components.
Claim 5
Dependent Claim 34 words
The apparatus of claim 3, further comprising a sixth data register used as a destination register for outputting said R, G and B components of said digital video pixel corresponding to said YVU pixel.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-10-12 2002-04-13 2002-10-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-10-12 2006-04-13 2006-10-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-10-12 2010-04-13 2010-10-13 $7700.00 Window Closed / Lapsed

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