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US5821160A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for forming a laser alterable fuse area of a memory cell using an etch stop layer

Assignee: NXP USA Inc
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Filing: 1996-06-06
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Granted: 1998-10-13
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Expires: 2016-06-06
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Abstract

Abstract A method for manufacturing an static random access memory (SRAM) cell (10) begins by manufacturing a fuse region (36) over a substrate (10). An etch stop layer (44) is formed overlying the fuse region (36) from resistor polysilicon material. In order for the fuse region (36) to be accessed and properly disabled, an opening (60) must be provided which stops on the etch stop layer (44). The etch stop (44) ensures a consistent and repeatable optimal thickness X of dielectric material above the fuse region (36) to provide for proper laser access and repair. The etch stop layer (44) therefore reduces wafer to wafer and die to die variation in thickness X and provides for a higher yield laser repair for each SRAM integrated circuit and every wafer processed using this methodology.

Inventors

  • 👤 Robert A. Rodriguez
  • 👤 Douglas J. Dopp
  • 👤 Robert E. Booth, Jr.

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 08:23
CPC Classifications
H; H10; H10B; H10B10/00; H10B10/15

Claims Analysis

Total Claims: 24
Claim 1
Independent Claim 127 words
A method of forming a semiconductor device, the method comprising: forming a conductive region overlying a substrate; forming an etch stop layer overlying the conductive region; forming at least one dielectric layer overlying the etch stop layer; etching an opening through the at least one dielectric layer using the etch stop layer as an etch stop for forming the opening, wherein the opening has a bottom, and at least a portion of the etch stop layer lies along the bottom of the opening at the end of the step of etching; and using focused energy through the opening to affect the conductivity of the conductive region, wherein the at least a portion of the etch stop layer lies along the bottom of the opening during this step.
Claim 2
Independent Claim 127 words
A method of forming a semiconductor device, the method comprising: forming a conductive region overlying a substrate; forming an etch stop layer overlying the conductive region; forming at least one dielectric layer overlying the etch stop layer; etching an opening through the at least one dielectric layer using the etch stop layer as an etch stop for forming the opening, wherein the opening has a bottom, and at least a portion of the etch stop layer lies along the bottom of the opening at the end of the step of etching; and using focused energy through the opening to affect the conductivity of the conductive region, wherein the at least a portion of the etch stop layer lies along the bottom of the opening during this step.
Claim 3
Dependent Claim 36 words
The method of claim 1 wherein the step of using focused energy comprises: using a laser source to provide a laser as the focused energy through the opening to affect the conductivity of the conductive region.
Claim 4
Dependent Claim 36 words
The method of claim 1, wherein the step of using focus energy comprises: vaporizing, via the focused energy, a portion of the conductive region to form an electrical open-circuit where the conductive region was previously located.
Claim 5
Dependent Claim 29 words
The method of claim 1 wherein the step of forming an etch stop layer overlying the conductive region further comprises: forming the etch stop layer from a polysilicon layer.
Claim 6
Dependent Claim 44 words
The method of claim 4 wherein the step of forming the etch stop layer further comprises: forming a resistive element overlying the substrate wherein the resistive element is lithographically formed from the same polysilicon layer that is used to form the etch stop layer.
Claim 7
Dependent Claim 37 words
The method of claim 5 wherein the step of forming the etch stop layer further comprises: forming the resistive element as an element selected from the group consisting of: a polysilicon resistor and a thin film transistor(TFT).
Claim 8
Dependent Claim 14 words
The method of claim 1, wherein the etch stop layer includes a nitrogen-containing material.
Claim 9
Dependent Claim 23 words
The method of claim 1 wherein the step of forming a conductive region comprises: forming the conductive region as a layer of polysilicon.
Claim 10
Dependent Claim 40 words
The method of claim 8 wherein the step of forming a conductive region comprises: forming the conductive region as a fuse made of polysilicon and coupled in series with a bit line transistor of a random access memory (RAM) cell.
Claim 11
Dependent Claim 41 words
The method of claim 8 wherein the step of forming a conductive region comprises: forming the fuse from the same layer of polysilicon which is used to make electrical contact to a storage node of a random access memory (RAM) cell.
Claim 12
Dependent Claim 42 words
The method of claim 1 further comprising: using the focused energy to decouple an inoperable memory cell from the semiconductor device in order to allow for the substitution of a redundant functional memory cell in the place of the inoperable memory cell.
Claim 13
Independent Claim 112 words
A method for forming a semiconductor device, the method comprising: forming an etch stop layer over a substrate; forming a first dielectric layer over the substrate; forming a fuse region over the first dielectric layer; forming a second dielectric layer over the fuse region; etching an opening to expose a portion of the etch stop layer, wherein the opening has a bottom, and the portion lies along the bottom of the opening at the end of the step of etching; using focused energy through the opening to affect the conductivity of the fuse region, wherein the portion of the etch stop layer lies along the bottom of the opening during this step.
Claim 14
Independent Claim 112 words
A method for forming a semiconductor device, the method comprising: forming an etch stop layer over a substrate; forming a first dielectric layer over the substrate; forming a fuse region over the first dielectric layer; forming a second dielectric layer over the fuse region; etching an opening to expose a portion of the etch stop layer, wherein the opening has a bottom, and the portion lies along the bottom of the opening at the end of the step of etching; using focused energy through the opening to affect the conductivity of the fuse region, wherein the portion of the etch stop layer lies along the bottom of the opening during this step.
Claim 15
Dependent Claim 35 words
The method of claim 12 wherein the step of etching comprises: etching the opening so that a portion of the etch stop layer underlying the fuse layer is exposed by a portion of the opening.
Claim 16
Dependent Claim 44 words
The method of claim 12 wherein the step of etching comprises: optically end-pointing an etch process used to form the opening when one of either the fuse region is exposed by the opening or when the etch stop layer is exposed by the opening.
Claim 17
Dependent Claim 52 words
The method of claim 12 wherein the step of forming a fuse region further comprises: forming the fuse region from a silicon semiconductive layer wherein the same silicon semiconductive layer is used to form a contact, which is electrically separated from the fuse region, to a transistor current electrode within the substrate.
Claim 18
Dependent Claim 33 words
The method of claim 12 wherein the step of forming an etch stop layer further comprises: forming the etch stop layer as a silicon semiconductive layer which is capped with a nitride layer.
Claim 19
Dependent Claim 34 words
The method of claim 12 wherein the step of forming an etch stop layer further comprises: forming the etch stop layer as a silicon semiconductive layer which is capped with a refractory metal silicide.
Claim 20
Dependent Claim 38 words
The method of claim 12 wherein the step of forming an etch stop layer further comprises: forming the etch stop layer as a silicon semiconductive layer which is capped with both a refractory metal silicide and nitride layer.
Claim 21
Dependent Claim 26 words
The method of claim 12 wherein the step of forming an etch stop layer further comprises: forming the etch stop layer as a silicon nitride layer.
Claim 22
Dependent Claim 54 words
The method of claim 12 wherein the step of etching further comprises: using the etch chemistry wherein the etch chemistry etches the at least one dielectric layer at a first etch rate and etches the etch stop layer at a second etch rate, the first etch rate being greater than the second etch rate.
Claim 23
Independent Claim 84 words
A method of forming a semiconductor device, the method comprising: forming a conductive region overlying a substrate; forming an etch stop layer overlying the conductive region, wherein the etch stop layer comprises a nitrogen-containing material; forming at least one dielectric layer overlying the etch stop layer; etching an opening through the at least one dielectric layer using the etch stop layer as an etch stop for forming the opening; and using focused energy through the opening to affect the conductivity of the conductive region.
Claim 24
Independent Claim 84 words
A method of forming a semiconductor device, the method comprising: forming a conductive region overlying a substrate; forming an etch stop layer overlying the conductive region, wherein the etch stop layer comprises a nitrogen-containing material; forming at least one dielectric layer overlying the etch stop layer; etching an opening through the at least one dielectric layer using the etch stop layer as an etch stop for forming the opening; and using focused energy through the opening to affect the conductivity of the conductive region.

References Cited (Backward Citations)

US4628590A Cited
US5096850A Cited
US5235205A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-10-12 2002-04-13 2002-10-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-10-12 2006-04-13 2006-10-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-10-12 2010-04-13 2010-10-13 $7700.00 Window Closed / Lapsed

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