Driver circuit for liquid crystal display device

Claim 2

A driver circuit for a liquid crystal display device comprising: an output terminal; a n N-MOS transistor; a P-MOS transistor, each of said N-MOS transistor and said P-MOS transistor having a source, a drain, a gate, a substrate and a threshold voltage, respectively, a voltage E N1 lowered for said threshold voltage from a voltage biased to said gate of said N-MOS transistor and a voltage E P1 lowered for said threshold voltage from a voltage biased to said gate of said P-MOS transistor being output from said source of said N-MOS transistor and from said source of said P-MOS transistor as a power source, and voltages of said drains, said gates and said substrates of said N-MOS transistor and said P-MOS transistor being set so that said voltage E N1 is greater than said voltage E P1 ; a first semiconductor switch connected between said output terminal and said N-MOS transistor; and a second semiconductor switch connected between said output terminal and said P-MOS transistor, said first and second semiconductor switches being controlled so that said voltage E N1 of said N-MOS transistor and said voltage E P1 of said P-MOS transistor arc alternately output through said output terminal.

Claim 3

A driver circuit as in claim 1, wherein said liquid crystal display device has a common electrode having a common electrode voltage, said voltage E N1- being greater than said common electrode voltage and said E P1- voltage being less than said common electrode voltage.

Claim 4

A driver circuit for a liquid crystal display device comprising: an output terminal; n in number of N-MOS transistors; m in number of P-MOS transistors, each of said N-MOS transistors and said P-MOS transistors having a source, a drain, a gate, a substrate and a threshold voltage, respectively, n in number of voltages E N lowered for said threshold voltages from voltages biased to said gates of said N-MOS transistors and m in number of voltages E P lowered for said threshold voltages from voltages biased to said gates of said P-MOS transistors being output from said sources of said N-MOS transistors and from said sources of said P-MOS transistors as power sources, and voltages of said drains, said gates and said substrates of said N-MOS transistors and said P-MOS transistors being set so that said voltages E N are greater than said voltages E P ; n in number of first semiconductor switches connected between said output terminal and n in number of said N-MOS transistors, respectively; and m in number of second semiconductor switches connected between said output terminal and m in number of said P-MOS transistors 1 respectively, said first and second semiconductor switches being controlled so that said voltages E N of said N-MOS transistors and said voltages E P of said P-MOS transistors are alternately output through said output terminal.

Claim 5

A driver circuit for a liquid crystal display device comprising: an output terminal; n in number of N-MOS transistors; m in number of P-MOS transistors, each of said N-MOS transistors and said P-MOS transistors having a source, a drain, a gate, a substrate and a threshold voltage, respectively, n in number of voltages E N lowered for said threshold voltages from voltages biased to said gates of said N-MOS transistors and m in number of voltages E P lowered for said threshold voltages from voltages biased to said gates of said P-MOS transistors being output from said sources of said N-MOS transistors and from said sources of said P-MOS transistors as power sources, and voltages of said drains, said gates and said substrates of said N-MOS transistors and said P-MOS transistors being set so that said voltages E N are greater than said voltages E P ; n in number of first semiconductor switches connected between said output terminal and n in number of said N-MOS transistors, respectively; and m in number of second semiconductor switches connected between said output terminal and m in number of said P-MOS transistors 1 respectively, said first and second semiconductor switches being controlled so that said voltages E N of said N-MOS transistors and said voltages E P of said P-MOS transistors are alternately output through said output terminal.

Claim 6

A driver circuit as in claim 3, wherein said liquid crystal display device has a common electrode having a common electrode voltage, said voltages E N- being greater than said common electrode voltage and said voltages E P- being less than said common electrode voltage.