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US5815646A Expired / Lapsed US ⏱️ 0.0 years remaining

Decompression processor for video applications

Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 1994-10-11
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Granted: 1998-09-29
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Expires: 2014-10-11
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Abstract

Abstract A method and structure including four video decompression structures and eight memory banks are provided for decoding high definition television (HDTV) signal. In this HDTV decompression structure, the 1920x1080 pixel display space is divided into four vertical sections of 480x1080 pixels. Each memory bank stores the values of pixels in one non-overlapping group of 240x1080 pixels. Each decompression structure decodes a 480x1088-pixel picture area with access to up to two additional 240x1088-pixel picture areas. The video decompression structures decode the vertical sections in lock-step to avoid the problem of the same bank of memory being accessed by more than one video decompression structure. In one embodiment of the present invention, a macroblock fetch can cross 1-4 DRAM page boundaries. So, in order to maintain the lock-step relationship of the video decompression structures, each page mode access is limited to fetching only an 8x8 quad pixel picture area, so that regardless of the number of DRAM page boundaries required to be crossed, four page mode access cycles are required for each reference macroblock fetched.

Inventors

  • 👤 Stephen C. Purcell
  • 👤 David E. Galbi
  • 👤 Frank H. Liao
  • 👤 Yvonne C. Tse

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 18:10
CPC Classifications
H; H04; H04N; H04N19/00; H03; H03M; H03M7/00; H03M7/30; H03M7/40; H03M7/42; H03M7/425; H04N19/10; H04N19/102; H04N19/124; H04N19/126; H04N19/42; H04N19/423; H04N19/43; H04N19/433; H04N19/60; H04N19/61; H04N19/70; H04N21/00; H04N21/40; H04N21/41; H04N21/426

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 92 words
A structure for processing a picture area of m×n pixels, comprising: 2r memory banks, each memory bank storing the values of pixels in one non-overlapping group of m/2r×n pixels in said picture area, m being greater than 1; and r processors, r being greater than 1, each accessing two associated memory banks in addition to one memory bank associated with a right neighbor if present and one memory bank associated with a left neighbor if present, each processor being responsible for processing the pixels associated with two of said accessible memory banks.
Claim 2
Dependent Claim 92 words
A structure for processing a picture area of m×n pixels, comprising: 2r memory banks, each memory bank storing the values of pixels in one non-overlapping group of m/2r×n pixels in said picture area, m being greater than 1; and r processors, r being greater than 1, each accessing two associated memory banks in addition to one memory bank associated with a right neighbor if present and one memory bank associated with a left neighbor if present, each processor being responsible for processing the pixels associated with two of said accessible memory banks.
Claim 3
Dependent Claim 87 words
A structure as in claim 1, wherein each processor is associated with two neighboring processors, each neighboring processors being one of said r processors, said four memory banks being associated with a contiguous picture area of 2m/r×n pixels, said processor being responsible for processing the pixels in the two memory banks associated with the middle portion of said 2m/r×n pixels picture area, and said neighboring processors being each responsible for processing one of the two groups of m/2r×n pixels on each side of said 2m/r×n picture area.
Claim 4
Dependent Claim 18 words
A structure as in claim 1, wherein said r processors each process said contiguous picture area in lockstep.
Claim 5
Dependent Claim 42 words
A structure as in claim 3, wherein each contiguous picture area is divided into an equal number of fixed-size picture areas, each processor further comprising means for ensuring that the time required for accessing each of said fixed-size areas is substantially constant.
Claim 6
Independent Claim 98 words
A method for processing a picture area of m×n pixels, comprising the steps of: providing 2r memory banks, each memory bank storing the values of pixels in one non-overlapping group of m/2r×n pixels in said picture area, m being greater than 1; and providing r processors, r being greater than 1, each accessing two associated memory banks in addition to one memory bank associated with a right neighbor if present and one memory bank associated with a left memory bank if present, each processor being responsible for processing the pixels associated with two of said accessible memory banks.
Claim 7
Independent Claim 98 words
A method for processing a picture area of m×n pixels, comprising the steps of: providing 2r memory banks, each memory bank storing the values of pixels in one non-overlapping group of m/2r×n pixels in said picture area, m being greater than 1; and providing r processors, r being greater than 1, each accessing two associated memory banks in addition to one memory bank associated with a right neighbor if present and one memory bank associated with a left memory bank if present, each processor being responsible for processing the pixels associated with two of said accessible memory banks.
Claim 8
Dependent Claim 95 words
A method as in claim 5, wherein said processor providing step further comprises the step of associating each processor with two neighboring processors, each neighboring processors being one of said r processors, said four memory banks being associated with a contiguous picture area of 2m/r×n pixels, said processor being responsible for processing the pixels in the two memory banks associated with the middle portion of said 2m/r×n pixels picture area, and said neighboring processors being each responsible for processing one of the two groups of m/2r×n pixels on each side of said 2m/r×n picture area.
Claim 9
Dependent Claim 23 words
A method as in claim 5, further comprising the step of ensuring said r processors each process said contiguous picture area in lockstep.
Claim 10
Dependent Claim 43 words
A method as in claim 7, wherein each contiguous picture area is divided into an equal number of fixed-size picture areas, said method further comprising the step of ensuring that the time required for accessing each of said fixed-size areas is substantially constant.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-09-28 2002-03-30 2002-09-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-09-28 2006-03-30 2006-09-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-09-28 2010-03-30 2010-09-29 $7700.00 Window Closed / Lapsed

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