Signal comprising binary spreading-code sequences

Claim 2

A signal comprising a set of binary spreading-code sequences modulated onto a sinusoidal carrier, said set of binary spreading-code sequences being produced by a process of simultaneously: a) combining contents of a single stage of a first multi-stage binary shift register with contents of each stage of a plurality of stages of a second multi-stage binary shift register, the contents of each stage of each of said first and second binary shift registers having a period of (2 n -1), where n is a fixed integer having the same value for each of said first and second binary shift registers, the contents of said stages of said first and second binary shift registers being combined by modulo-2 addition to produce a first subset of combined spreading-code sequences, and b) combining contents of a single stage of said second binary shift register with contents of each stage of a plurality of stages of said first binary shift register by modulo-2 addition to produce a second subset of combined spreading-code sequences, said first and second subsets of combined spreading-code sequences having cross-correlation properties as follows: (i) a cross-correlation between any two of said combined binary spreading-code sequences over any contiguous (2 n -1) bits has a magnitude ≦(2.sup. (n+1)/2! +1), where (n+1)/2! denotes the greatest integer ≦(n+1)/2; and (ii) a cross-correlation at zero offset between any two of said combined binary spreading-code sequences in either one of said first and second subsets has a magnitude equal to one.

Claim 3

A signal comprising a set of binary spreading-code sequences modulated onto a sinusoidal carrier, said set of binary spreading-code sequences being produced by a process of: a) specifying a switching interval consisting of a fixed number of steps for each of a first multi-stage binary shift register and a second multi-stage binary shift register, contents of each stage of each of said first and second binary shift registers having a period of (2 n -1), where n is a fixed integer having the same value for each of said first and second binary shift registers; b) inserting contents into each stage of said first and second binary shift registers once per said switching interval; c) combining the contents of a single stage of said first binary shift register with the contents of a single stage of said second binary shift register by modulo-2 addition at each step of said first and second binary shift registers to produce binary spreading-code sequences such that any two of said binary spreading-code sequences have cross-correlation properties as follows: (i) a cross-correlation between any two of said binary spreading-code sequences over any contiguous (2 n -1) bits has a magnitude ≦(2.sup. (n+1)/2! +1), where (n+1)/2! denotes the greatest integer ≦(n+1)/2; (ii) a cross-correlation at zero offset over any contiguous (2 n -1) bits between any two of said binary spreading-code sequences for which the initial contents of said first binary shift register are identical has a magnitude equal to one; and (iii) a cross-correlation at zero offset over any contiguous (2 n -1) bits between any two of said binary spreading-code sequences for which the initial contents of said second binary shift register are identical has a magnitude equal to one.

Claim 4

A signal comprising a set of binary spreading-code sequences modulated onto a sinusoidal carrier, said set of binary spreading-code sequences being produced by a process of: a) specifying a switching interval consisting of a fixed number of steps for each of a first multi-stage binary shift register and a second multi-stage binary shift register, contents of each stage of each of said first and second binary shift registers having a period of (2 n -1), where n is a fixed integer having the same value for each of said first and second binary shift registers; b) inserting contents into each stage of said first and second binary shift registers once per said switching interval; c) combining the contents of a single stage of said first binary shift register with the contents of a single stage of said second binary shift register by modulo-2 addition at each step of said first and second binary shift registers to produce binary spreading-code sequences such that any two of said binary spreading-code sequences have cross-correlation properties as follows: (i) a cross-correlation between any two of said binary spreading-code sequences over any contiguous (2 n -1) bits has a magnitude ≦(2.sup. (n+1)/2! +1), where (n+1)/2! denotes the greatest integer ≦(n+1)/2; (ii) a cross-correlation at zero offset over any contiguous (2 n -1) bits between any two of said binary spreading-code sequences for which the initial contents of said first binary shift register are identical has a magnitude equal to one; and (iii) a cross-correlation at zero offset over any contiguous (2 n -1) bits between any two of said binary spreading-code sequences for which the initial contents of said second binary shift register are identical has a magnitude equal to one.