US5814545A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device having a phosphorus doped PECVD film and a method of manufacture
Assignee: NXP USA Inc
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Filing: 1997-03-04
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Granted: 1998-09-29
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Expires: 2017-03-04
Abstract
Abstract Portions of a semiconductor device (10,30) are formed from a dielectric layer (16,38,46) which is deposited using a plasma enhanced chemical vapor deposition (PECVD) process which adds trimethylphosphite as a dopant source during the deposition. A first embodiment forms sidewall spacers (17) adjacent to a gate structure (14) and forms doped regions (19) under the sidewall spacers (17) by annealing the dielectric layer (16) and driving phosphorus into a substrate (11). A second embodiment uses the trimethylphosphite doped film as an interlevel dielectric layer (38) which can be planarized to provide a flat surface for the formation of metal interconnect lines. A third embodiment of the present invention uses the trimethylphosphite doped film as a passivation layer (46) which is deposited in a single step process and has a phosphorus concentration to getter mobile ions.
Inventors
- 👤 Kenneth M. Seddon
- 👤 Gregory W. Grynkewich
- 👤 Vida Ilderem
- 👤 Heidi L. Denton
- 👤 Jeffrey Pearse
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 21:21
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/0212; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/141; H10P32/17; H10P32/171; H10W; H10W20/00; H10W20/01; H10W20/071
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
158 words
A method for manufacturing a semiconductor device comprising the steps of: providing a semiconductor substrate of a first conductivity and having a surface; growing a layer of silicon dioxide on the semiconductor substrate; depositing a layer of polysilicon on the semiconductor substrate; patterning the layer of silicon dioxide and the layer of polysilicon to form a gate structure that extends above the surface of the semiconductor substrate; depositing a dielectric layer overlying the gate structure and the semiconductor substrate, wherein the dielectric layer is formed by a plasma enhanced chemical vapor deposition process and the dielectric layer is doped with trimethylphosphite as the dielectric layer is deposited; etching the dielectric layer with a reactive ion etch process thereby forming sidewall spacers adjacent to the gate structure; annealing the semiconductor substrate thereby driving phosphorus from the dielectric layer and forming doped regions under the sidewall spacers; and forming a source region and a drain region in the semiconductor substrate.
Claim 2
Independent Claim
158 words
A method for manufacturing a semiconductor device comprising the steps of: providing a semiconductor substrate of a first conductivity and having a surface; growing a layer of silicon dioxide on the semiconductor substrate; depositing a layer of polysilicon on the semiconductor substrate; patterning the layer of silicon dioxide and the layer of polysilicon to form a gate structure that extends above the surface of the semiconductor substrate; depositing a dielectric layer overlying the gate structure and the semiconductor substrate, wherein the dielectric layer is formed by a plasma enhanced chemical vapor deposition process and the dielectric layer is doped with trimethylphosphite as the dielectric layer is deposited; etching the dielectric layer with a reactive ion etch process thereby forming sidewall spacers adjacent to the gate structure; annealing the semiconductor substrate thereby driving phosphorus from the dielectric layer and forming doped regions under the sidewall spacers; and forming a source region and a drain region in the semiconductor substrate.
Claim 3
Dependent Claim
65 words
The method for manufacturing a semiconductor device of claim 1 further comprising the steps of: depositing a layer of refractory material on the semiconductor substrate and the gate structure; annealing the layer of refractory material to form silicide regions contacting the source region, the drain region, and the gate structure; and removing any remaining portions of the layer of refractory material from the semiconductor substrate.
Claim 4
Dependent Claim
38 words
The method for manufacturing a semiconductor device of claim 1, wherein the step of depositing a dielectric layer comprises doping the dielectric layer with trimethylphosphite to provide a phosphorus concentration of 1 percent to 12 percent by weight.
Claim 5
Dependent Claim
33 words
The method for manufacturing a semiconductor device of claim 1, wherein the step of depositing a dielectric layer overlying the gate structure and the semiconductor substrate comprises forming a layer of silicon dioxide.
Claim 6
Independent Claim
131 words
A method for manufacturing a semiconductor device comprising the steps of: providing a semiconductor substrate having a surface; forming a gate structure having sides on the surface of the semiconductor device; forming a dielectric layer overlying the gate structure and the surface of the semiconductor substrate by using plasma enhanced chemical vapor deposition that is doped with trimethylphosphite as the dielectric layer is deposited; removing a portion of the dielectric layer to form sidewall spacers on the sides of the gate structure; heating the semiconductor substrate thereby driving phosphorus from the dielectric layer and forming doped regions under the sidewall spacers; depositing a layer of refractory material on the semiconductor substrate and the gate structure; and annealing the layer of refractory material to form a silicide region on the gate structure.
Claim 7
Independent Claim
131 words
A method for manufacturing a semiconductor device comprising the steps of: providing a semiconductor substrate having a surface; forming a gate structure having sides on the surface of the semiconductor device; forming a dielectric layer overlying the gate structure and the surface of the semiconductor substrate by using plasma enhanced chemical vapor deposition that is doped with trimethylphosphite as the dielectric layer is deposited; removing a portion of the dielectric layer to form sidewall spacers on the sides of the gate structure; heating the semiconductor substrate thereby driving phosphorus from the dielectric layer and forming doped regions under the sidewall spacers; depositing a layer of refractory material on the semiconductor substrate and the gate structure; and annealing the layer of refractory material to form a silicide region on the gate structure.
Claim 8
Dependent Claim
37 words
The method for manufacturing a semiconductor device of claim 5, wherein the step of forming a dielectric layer comprises doping the dielectric layer with trimethylphosphite to a phosphorus concentration of 1 percent to 12 percent by weight.
Claim 9
Dependent Claim
25 words
The method for manufacturing a semiconductor device of claim 5, wherein the step of forming a dielectric layer comprises forming a layer of silicon dioxide.
Claim 10
Independent Claim
127 words
A method of forming a semiconductor device comprising the steps of: providing a semiconductor substrate having a surface; forming a gate structure on the semiconductor substrate that extends above the surface of the semiconductor substrate; depositing a dielectric layer overlying the gate structure, wherein the dielectric layer is formed by a plasma enhanced chemical vapor deposition process that dopes the dielectric layer with trimethylphosphite as the dielectric layer is deposited; forming sidewall spacers adjacent to the gate structure by removing portions of the dielectric layer; heating the semiconductor substrate thereby driving phosphorus from the sidewall spacers into the semiconductor substrate to form doped regions underlying the sidewall spacers; and forming a source and drain region in the semiconductor substrate after the step of heating the semiconductor substrate.
Claim 11
Independent Claim
127 words
A method of forming a semiconductor device comprising the steps of: providing a semiconductor substrate having a surface; forming a gate structure on the semiconductor substrate that extends above the surface of the semiconductor substrate; depositing a dielectric layer overlying the gate structure, wherein the dielectric layer is formed by a plasma enhanced chemical vapor deposition process that dopes the dielectric layer with trimethylphosphite as the dielectric layer is deposited; forming sidewall spacers adjacent to the gate structure by removing portions of the dielectric layer; heating the semiconductor substrate thereby driving phosphorus from the sidewall spacers into the semiconductor substrate to form doped regions underlying the sidewall spacers; and forming a source and drain region in the semiconductor substrate after the step of heating the semiconductor substrate.
Claim 12
Dependent Claim
43 words
The method of claim 8 wherein the gate structure has a height in the range of 1,000 to 4,000 angstroms and the step of forming the sidewall spacers includes the step of removing portions of the dielectric layer with a reactive ion etch.
Claim 13
Dependent Claim
30 words
The method of claim 9 wherein the step of forming the sidewall spacers includes forming sidewall spacers that have a width substantially equal to the thickness of the dielectric layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2001-09-28 | 2002-03-30 | 2002-09-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-09-28 | 2006-03-30 | 2006-09-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-09-28 | 2010-03-30 | 2010-09-29 | $7700.00 | Window Closed / Lapsed |