On-line disk array reconfiguration

Claim 3

The method of claim 1, wherein step (d) further includes the steps of: determining if said specified blocks requested by said host request are partially located in the source logical volume and partially located in the destination logical volume; and if said specified blocks are partially in said source and destination logical volumes, suspending said host request until said moving steps (a) and (b) have moved all said specified blocks into the destination logical volume.

Claim 4

The method of claim 1, wherein the disk array has a predetermined number of disk drives, and wherein the reconfiguration method is performed when a new disk drive is added to expand the disk array, the source logical volume being defined on said predetermined number of disk drives and the destination volume being defined on said predetermined number of disk drives and said new disk drive.

Claim 5

The method of claim 3, wherein excess storage space exists in the disk array after the disk array is expanded, the method further comprising the step of: creating a new logical volume in said excess storage space.

Claim 6

The method of claim 1, further comprising the steps of: allocating a portion of the posting memory for the reconfiguration method; and locking said portion of the posting memory to prevent access to said portion by other host requests.

Claim 7

The method of claim 1, wherein configuration parameters for the source logical volume differ from configuration parameters for the destination logical volume.

Claim 8

The method of claim 6, wherein configuration parameters for the source logical volume are used to move the transfer unit of data from the source logical volume to the posting memory and configuration parameters for the destination logical volume are used to move the transfer unit of data from the posting memory to the destination logical volume.

Claim 9

The disk controller of claim 1, wherein configuration parameters for the source logical volume differ from configuration parameters for the destination logical volume.

Claim 10

The disk controller of claim 8, wherein configuration parameters for the source logical volume are used to move the transfer unit of data from the source logical volume to the posting memory and configuration parameters for the destination logical volume are used to move the transfer unit of data from the posting memory to the destination logical volume.

Claim 11

The method of claim 1, further comprising the steps of: determining if a unit of data to be reconfigured is being processed by host requests; and suspending the reconfiguration process until the host request is complete.

Claim 14

The method of claim 11, wherein the source logical volume has a first stripe and a last stripe, wherein the destination logical volume has a first stripe and a last stripe, and wherein the source logical volume is defined on a first number of disk drives and the destination logical volume is defined on a second number of disk drives, the method further comprising the steps of: determining if said first number of disk drives is greater than said second number of disk drives, wherein, if said first number is greater than said second number, said moving step (a) proceeds in a direction from said last source volume stripe to said first source volume stripe, and said moving step (b) proceeds in a direction from said last destination volume stripe to said first destination volume stripe, and wherein, if said first number is not greater than said second number, said moving step (a) proceeds in a direction from said first source volume stripe to said last source volume stripe, and said moving step (b) proceeds in a direction from said first destination volume stripe to said last destination volume stripe.

Claim 15

The method of claim 12, wherein said size of said transfer unit moved to said last destination volume stripe is less than or equal to said second stripe size, said size of said transfer unit moved to said last destination volume stripe being dependent upon the relationship between said first stripe size and said second stripe size.

Claim 18

The method of claim 14, further comprising the step of: saving said progress information to said configuration area before each of steps (a) and (b).

Claim 19

A disk controller for transferring data between a disk array and a host computer, the disk controller comprising: a bus; a posting memory coupled to said bus; means coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volume, said source and destination logical volumes being defined on the disk array, and said reconfiguring means including: first means coupled to said bus for moving data from said source logical volume to said posting memory, said data being moved one transfer unit at a time; second means coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; means coupled to said bus for receiving a host request from the host computer, said host request asserted for specified blocks of data; means coupled to said receiving means for determining if said requested blocks are located in said source logical volume or said destination logical volume; and means coupled to said determining means for pointing said host request to the appropriate one of said source and destination logical volumes, wherein the transfer unit of data is a stripe not presently being configured of a data block undergoing reconfiguration.

Claim 20

A disk controller for transferring data between a disk array and a host computer, the disk controller comprising: a bus; a posting memory coupled to said bus; means coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volume, said source and destination logical volumes being defined on the disk array, and said reconfiguring means including: first means coupled to said bus for moving data from said source logical volume to said posting memory, said data being moved one transfer unit at a time; second means coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; means coupled to said bus for receiving a host request from the host computer, said host request asserted for specified blocks of data; means coupled to said receiving means for determining if said requested blocks are located in said source logical volume or said destination logical volume; and means coupled to said determining means for pointing said host request to the appropriate one of said source and destination logical volumes, wherein the transfer unit of data is a stripe not presently being configured of a data block undergoing reconfiguration.

Claim 21

The disk controller of claim 16, wherein the disk array has a predetermined number of disk drives, and wherein said reconfiguration means expands the disk array when a new disk drive is added to the disk array, said source logical volume being defined on said predetermined number of disk drives and said destination logical volume being defined on said predetermined number of disk drives and said new disk drive.

Claim 22

The disk controller of claim 17, wherein excess storage space exists in the disk array after the disk array is expanded, the disk controller further comprising: means coupled to said bus for creating a new logical volume in said excess storage space.

Claim 23

The disk controller of claim 16, wherein said reconfiguration means further includes: means coupled to said host request receiving means for determining if said specified blocks are partially located in said source logical volume and partially located in said destination logical volume; and means coupled to said bus and said partial volume determining means for suspending said host request until said first moving means and said second moving means have moved all said specified blocks into said destination logical volume if said specified blocks are partially in said source and destination logical volumes.

Claim 24

The disk controller of claim 16, further comprising: a battery coupled to said posting memory for battery backing said posting memory, wherein said posting memory further contains a configuration area for storing progress information associated with a reconfigure request, and wherein said reconfiguration means further includes: means coupled to said bus for retrieving said progress information from said configuration area if a power failure occurred in the host computer; and means coupled to said retrieving means for restarting a reconfigure request based on said progress information.

Claim 25

The disk controller of claim 20, wherein said reconfiguration means further includes: means coupled to said bus for saving said progress information to said configuration area before said first moving means moves data and before said second moving means moves data.

Claim 26

The disk controller of claim 16, further comprising: means coupled to said bus for allocating a portion of said posting memory for a reconfigure request; and means coupled to said bus for locking said portion of said posting memory to prevent access to said portion by other host requests.

Claim 27

The disk controller of claim 16, said means coupled to said bus for reconfiguring the disk array further comprising: a means for determining if the unit of data to be reconfigured is being processed by a host request; and a means for suspending the reconfiguration process until the host request is complete.

Claim 28

A disk controller for transferring data between a disk array and a host computer, the disk controller comprising: a bus; a posting memory coupled to said bus; means coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volume, said source and destination logical volumes being defined on the disk array, and said reconfiguring means including: first means coupled to said bus for moving data from said source logical volume to said posting memory, said data being moved one transfer unit at a time; second means coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; means coupled to said bus for receiving a host request from the host computer, said host request asserted for specified blocks of data; means coupled to said receiving means for determining if said requested blocks are located in said source logical volume or said destination logical volume; and means coupled to said determining means for pointing said host request to the appropriate one of said source and destination logical volumes, wherein said source logical volume has a first stripe size and said destination logical volume has a second stripe size, and wherein said transfer unit has a size equal to the least common denominator of said first and second stripe sizes.

Claim 29

A disk controller for transferring data between a disk array and a host computer, the disk controller comprising: a bus; a posting memory coupled to said bus; means coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volume, said source and destination logical volumes being defined on the disk array, and said reconfiguring means including: first means coupled to said bus for moving data from said source logical volume to said posting memory, said data being moved one transfer unit at a time; second means coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; means coupled to said bus for receiving a host request from the host computer, said host request asserted for specified blocks of data; means coupled to said receiving means for determining if said requested blocks are located in said source logical volume or said destination logical volume; and means coupled to said determining means for pointing said host request to the appropriate one of said source and destination logical volumes, wherein said source logical volume has a first stripe size and said destination logical volume has a second stripe size, and wherein said transfer unit has a size equal to the least common denominator of said first and second stripe sizes.

Claim 30

The disk controller of claim 24, wherein said source logical volume has a first stripe and a last stripe and wherein said destination logical volume has a first stripe and a last stripe, wherein the source logical volume is defined on a first number of disk drives and the destination logical volume is defined on a second number of disk drives, and wherein said reconfiguration means further includes: means coupled to said bus for determining if said first number of disk drives is greater than said second number of disk drives, wherein, if said first number is greater than said second number, said first moving means proceeds in a direction from said last source volume stripe to said first source volume stripe, and said second moving means proceeds in a direction from said last destination volume stripe to said first destination volume stripe, and wherein, if said first number is not greater than said second number, said first moving means proceeds in a direction from said first source volume stripe to said last source volume stripe, and said second moving means proceeds in a direction from said first destination volume stripe to said last destination volume stripe.

Claim 31

The disk controller of claim 25, wherein said size of said transfer unit moved to said last destination volume stripe is less than or equal to said second stripe size, said size of said transfer unit in said last destination volume stripe being dependent upon the relationship between said first stripe size and said second stripe size.

Claim 32

A disk controller for transferring data between a disk array and a host computer, the disk controller comprising: a bus; a posting memory coupled to said bus means coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volume, said source and destination logical volumes being defined on the disk array, and said reconfiguring means including: first means coupled to said bus for moving data from said source logical volume to said posting memory, said data being moved one transfer unit at a time; second means coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; means coupled to said bus for receiving a host request from the host computer, said host request asserted for specified blocks of data; means coupled to said receiving means for determining if said requested blocks are located in said source logical volume or said destination logical volume; and means coupled to said determining means for pointing said host request to the appropriate one of said source and destination logical volumes, wherein said reconfiguration means further includes: means coupled to said bus for receiving reconfigure requests from the host computer; and a queue coupled to said reconfigure request receiving means, said reconfigure requests being entered into said queue, wherein said reconfiguration means is activated if a reconfigure request is pending in said queue.

Claim 33

A disk controller for transferring data between a disk array and a host computer, the disk controller comprising: a bus; a posting memory coupled to said bus means coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volume, said source and destination logical volumes being defined on the disk array, and said reconfiguring means including: first means coupled to said bus for moving data from said source logical volume to said posting memory, said data being moved one transfer unit at a time; second means coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; means coupled to said bus for receiving a host request from the host computer, said host request asserted for specified blocks of data; means coupled to said receiving means for determining if said requested blocks are located in said source logical volume or said destination logical volume; and means coupled to said determining means for pointing said host request to the appropriate one of said source and destination logical volumes, wherein said reconfiguration means further includes: means coupled to said bus for receiving reconfigure requests from the host computer; and a queue coupled to said reconfigure request receiving means, said reconfigure requests being entered into said queue, wherein said reconfiguration means is activated if a reconfigure request is pending in said queue.

Claim 34

The disk controller of claim 27, wherein said reconfiguration means further includes: means coupled to said bus for receiving an abort request issued by the host computer; and means coupled to said abort request receiving means for removing a reconfigure request from said queue to abort said reconfigure request.

Claim 35

A disk controller for transferring data between a disk array and a host computer, the disk controller comprising: a bus; a posting memory coupled to said bus; reconfiguring processor logic coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volume, said source and destination logical volumes being defined on the disk array, and said reconfiguring processor logic including: first data transfer logic coupled to said bus for moving data from said source logical volume to said posting memory, said data being moved one transfer unit at a time; second data transfer logic coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; host request receiving logic coupled to said bus for receiving a host request from the host computer, said host request asserted for specified blocks of data; determining logic coupled to said host request receiving logic for determining if said requested blocks are located in said source logical volume or said destination logical volume; and indicator logic coupled to said determining logic for pointing said host request to the appropriate one of said source and destination logical volumes, wherein the transfer unit of data is a stripe of a data block undergoing reconfiguration whereby the stripe is not presently being reconfigured.

Claim 36

A disk controller for transferring data between a disk array and a host computer, the disk controller comprising: a bus; a posting memory coupled to said bus; reconfiguring processor logic coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volume, said source and destination logical volumes being defined on the disk array, and said reconfiguring processor logic including: first data transfer logic coupled to said bus for moving data from said source logical volume to said posting memory, said data being moved one transfer unit at a time; second data transfer logic coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; host request receiving logic coupled to said bus for receiving a host request from the host computer, said host request asserted for specified blocks of data; determining logic coupled to said host request receiving logic for determining if said requested blocks are located in said source logical volume or said destination logical volume; and indicator logic coupled to said determining logic for pointing said host request to the appropriate one of said source and destination logical volumes, wherein the transfer unit of data is a stripe of a data block undergoing reconfiguration whereby the stripe is not presently being reconfigured.

Claim 37

The disk controller of claim 29, wherein the disk array has a predetermined number of disk drives, and wherein said reconfiguring processor logic expands the disk array when a new disk drive is added to the disk array, said source logical volume being defined on said predetermined number of disk drives and said destination logical volume being defined on said predetermined number of disk drives and said new disk drive.

Claim 38

The disk controller of claim 30, wherein excess storage space exists in the disk array after the disk array is expanded, the disk controller further comprising: volume expansion logic coupled to said bus for creating a new logical volume in said excess storage space.

Claim 39

The disk controller of claim 29, wherein said reconfiguring processor logic further includes: partial volume logic coupled to said host request receiving means for determining if said specified blocks are partially located in said source logical volume and partially located in said destination logical volume; and request suspension logic coupled to said bus and said partial volume logic for suspending said host request until said first data transfer logic and said second data transfer logic have moved all said specified blocks into said destination logical volume if said specified blocks are partially in said source and destination logical volumes.

Claim 40

The disk controller of claim 29, further comprising: a battery coupled to said posting memory for battery backing said posting memory, wherein said posting memory further contains a configuration area for storing progress information associated with a reconfigure request, and wherein said reconfiguring processor logic further includes: progress information retrieval logic coupled to said bus for retrieving said progress information from said configuration area if a power failure occurred in the host computer; and restart logic coupled to said progress information retrieval logic for restarting a reconfigure request based on said progress information.

Claim 41

The disk controller of claim 33, wherein said reconfiguring processor logic further includes: progress information save logic coupled to said bus for saving said progress information to said configuration area before said first data transfer logic moves data and before said second data transfer logic moves data.

Claim 42

The disk controller of claim 29, further comprising: allocation logic coupled to said bus for allocating a portion of said posting memory for a reconfigure request; and memory locking logic coupled to said bus for locking said allocated portion of said posting memory to prevent access to said portion by other host requests.

Claim 43

The disk controller of claim 29, wherein configuration parameters for the source logical volume differ from configuration parameters for the destination logical volume.

Claim 44

The disk controller of claim 36, wherein configuration parameters for the source logical volume are used to move the transfer unit of data from the source logical volume to the posting memory and configuration parameters for the destination logical volume are used to move the transfer unit of data from the posting memory to the destination logical volume.

Claim 45

The disk controller of claim 29, said means coupled to said bus for reconfiguring the disk array further comprising: a means for determining if the unit of data to be reconfigured is being processed by a host request; and a means for suspending the reconfiguration process until the host request is complete.

Claim 46

A disk controller for transferring data between a disk array and a host computer the disk controller comprising: a bus; a posting memory coupled to said bus; reconfiguring processor logic coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volume, said source and destination logical volumes being defined on the disk array, and said reconfiguring processor logic including: first data transfer logic coupled to said bus for moving data from said source logical volume to said posting memory, said data being moved one transfer unit at a time; second data transfer logic coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; host request receiving logic coupled to said bus for receiving a host request from the host computer, said host request asserted for specified blocks of data; determining logic coupled to said host request receiving logic for determining if said requested blocks are located in said source logical volume or said destination logical volume; and indicator logic coupled to said determining logic for pointing said host request to the appropriate one of said source and destination logical volumes, wherein said source logical volume has a first stripe size and said destination logical volume has a second stripe size, and wherein said transfer unit has a size equal to the least common denominator of said first and second stripe sizes; and wherein the transfer unit of data is a stripe not presently being reconfigured.

Claim 47

A disk controller for transferring data between a disk array and a host computer the disk controller comprising: a bus; a posting memory coupled to said bus; reconfiguring processor logic coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volume, said source and destination logical volumes being defined on the disk array, and said reconfiguring processor logic including: first data transfer logic coupled to said bus for moving data from said source logical volume to said posting memory, said data being moved one transfer unit at a time; second data transfer logic coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; host request receiving logic coupled to said bus for receiving a host request from the host computer, said host request asserted for specified blocks of data; determining logic coupled to said host request receiving logic for determining if said requested blocks are located in said source logical volume or said destination logical volume; and indicator logic coupled to said determining logic for pointing said host request to the appropriate one of said source and destination logical volumes, wherein said source logical volume has a first stripe size and said destination logical volume has a second stripe size, and wherein said transfer unit has a size equal to the least common denominator of said first and second stripe sizes; and wherein the transfer unit of data is a stripe not presently being reconfigured.

Claim 48

The disk controller of claim 39, wherein said source logical volume has a first stripe and a last stripe and wherein said destination logical volume has a first stripe and a last stripe, wherein the source logical volume is defined on a first number of disk drives and the destination logical volume is defined on a second number of disk drives, and wherein said reconfiguring processor logic further includes: determining logic coupled to said bus for determining if said first number of disk drives is greater than said second number of disk drives, wherein, if said first number is greater than said second number, said first data transfer logic proceeds in a direction from said last source volume stripe to said first source volume stripe, and said second data transfer logic proceeds in a direction from said last destination volume stripe to said first destination volume stripe, and wherein, if said first number is not greater than said second number, said first data transfer logic proceeds in a direction from said first source volume stripe to said last source volume stripe, and said second data transfer logic proceeds in a direction from said first destination volume stripe to said last destination volume stripe.

Claim 49

The disk controller of claim 40, wherein said size of said transfer unit moved to said last destination volume stripe is less than or equal to said second stripe size, said size of said transfer unit in said last destination volume stripe being dependent upon the relationship between said first stripe size and said second stripe size.

Claim 50

A disk controller for transferring data between a disk array and a host computer, the disk controller comprising: a bus; a posting memory coupled to said bus; reconfiguring processor logic coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volume, said source and destination logical volumes being defined on the disk array, and said reconfiguring processor logic including: first data transfer logic coupled to said bus for moving data from said source logical volume to said posting memory, said data being moved one transfer unit at a time; second data transfer logic coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; host request receiving logic coupled to said bus for receiving a host request from the host computer said host request asserted for specified blocks of data; determining logic coupled to said host request receiving logic for determining if said requested blocks are located in said source logical volume or said destination logical volume; and indicator logic coupled to said determining logic for pointing said host request to the appropriate one of said source and destination logical volumes, wherein said reconfiguring processor logic further includes: reconfigure request receiving logic coupled to said bus for receiving reconfigure requests from the host computer; and a queue coupled to said reconfigure request receiving logic, said reconfigure requests being entered into said queue, wherein said reconfiguring processor logic is activated if a reconfigure request is pending in said queue.

Claim 51

A disk controller for transferring data between a disk array and a host computer, the disk controller comprising: a bus; a posting memory coupled to said bus; reconfiguring processor logic coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volume, said source and destination logical volumes being defined on the disk array, and said reconfiguring processor logic including: first data transfer logic coupled to said bus for moving data from said source logical volume to said posting memory, said data being moved one transfer unit at a time; second data transfer logic coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; host request receiving logic coupled to said bus for receiving a host request from the host computer said host request asserted for specified blocks of data; determining logic coupled to said host request receiving logic for determining if said requested blocks are located in said source logical volume or said destination logical volume; and indicator logic coupled to said determining logic for pointing said host request to the appropriate one of said source and destination logical volumes, wherein said reconfiguring processor logic further includes: reconfigure request receiving logic coupled to said bus for receiving reconfigure requests from the host computer; and a queue coupled to said reconfigure request receiving logic, said reconfigure requests being entered into said queue, wherein said reconfiguring processor logic is activated if a reconfigure request is pending in said queue.

Claim 52

The disk controller of claim 42, wherein said reconfiguring processor logic further includes: abort request receiving logic coupled to said bus for receiving an abort request issued by the host computer; and request removal logic coupled to said abort request receiving logic for removing a reconfigure request from said queue to abort said reconfigure request.

Claim 53

A computer system comprising: a host computer; a disk array; a disk controller for transferring data between a disk array and a host computer, the disk controller comprising: a bus; a posting memory coupled to said bus; reconfiguring processor logic coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volume, said source and destination logical volumes being defined on the disk array, and said reconfiguring processor logic including: first data transfer logic coupled to said bus for moving data from said source logical volume to said posting memory, said data being moved one transfer unit at a time, second data transfer logic coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; host request receiving logic coupled to said bus for receiving a host request from the host computer, said host request asserted for specified blocks of data; determining logic coupled to said host request receiving logic for determining if said requested blocks are located in said source logical volume or said destination logical volume; and indicator logic coupled to said determining logic for pointing said host request to the appropriate one of said source and destination logical volumes, wherein the transfer unit of data is a stripe not presently being reconfigured of a data block undergoing reconfiguration.

Claim 54

A computer system comprising: a host computer; a disk array; a disk controller for transferring data between a disk array and a host computer, the disk controller comprising: a bus; a posting memory coupled to said bus; reconfiguring processor logic coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volume, said source and destination logical volumes being defined on the disk array, and said reconfiguring processor logic including: first data transfer logic coupled to said bus for moving data from said source logical volume to said posting memory, said data being moved one transfer unit at a time, second data transfer logic coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; host request receiving logic coupled to said bus for receiving a host request from the host computer, said host request asserted for specified blocks of data; determining logic coupled to said host request receiving logic for determining if said requested blocks are located in said source logical volume or said destination logical volume; and indicator logic coupled to said determining logic for pointing said host request to the appropriate one of said source and destination logical volumes, wherein the transfer unit of data is a stripe not presently being reconfigured of a data block undergoing reconfiguration.

Claim 55

The computer system of claim 44, wherein said disk array has a predetermined number of disk drives, and wherein said reconfiguring processor logic expands said disk array when a new disk drive is added to said disk array, said source logical volume being defined on said predetermined number of disk drives and said destination logical volume being defined on said predetermined number of disk drives and said new disk drive.

Claim 56

The computer system of claim 39, wherein excess storage space exists in said disk array after said disk array is expanded, said disk controller further comprising: volume expansion logic coupled to said bus for creating a new logical volume in said excess storage space.

Claim 57

The computer system of claim 35, wherein said reconfiguring processor logic further includes: partial volume logic coupled to said host request receiving means for determining if said specified blocks are partially located in said source logical volume and partially located in said destination logical volume; and request suspension logic coupled to said bus and said partial volume logic for suspending said host request until said first data transfer logic and said second data transfer logic have moved all said specified blocks into said destination logical volume if said specified blocks are partially in said source and destination logical volumes.

Claim 58

The computer system of claim 44, further comprising: a battery coupled to said posting memory for battery backing said posting memory, wherein said posting memory further contains a configuration area for storing progress information associated with a reconfigure request, and wherein said reconfiguring processor logic further includes: progress information retrieval logic coupled to said bus for retrieving said progress information from said configuration area if a power failure occurred in said host computer; and restart logic coupled to said progress information retrieval logic for restarting a reconfigure request based on said progress information.

Claim 59

The computer system of claim 48, wherein said reconfiguring processor logic further includes: progress information save logic coupled to said bus for saving said progress information to said configuration area before said first data transfer logic moves data and before said second data transfer logic moves data.

Claim 60

The computer system of claim 44, further comprising: allocation logic coupled to said bus for allocating a portion of said posting memory for a reconfigure request; and memory locking logic coupled to said bus for locking said allocated portion of said posting memory to prevent access to said portion by other host requests.

Claim 61

The computer system of claim 44, wherein configuration parameters for the source logical volume differ from configuration parameters for the destination logical volume.

Claim 62

The computer system of claim 51, wherein configuration parameters for the source logical volume are used to move the transfer unit of data from the source logical volume to the posting memory and configuration parameters for the destination logical volume are used to move the transfer unit of data from the posting memory to the destination logical volume.

Claim 63

The computer system of claim 44, said reconfiguring processor logic further comprising: a means for determining if the unit of data to be reconfigured is being processed by a host request; and a means for suspending the reconfiguration process until the host request is complete if the unit of data to be reconfigured is being processed by a host request.

Claim 64

A computer system comprising: a host computer; a disk array; a disk controller for transferring data between a disk array and a host computer, the disk controller comprising: a bus; a posting memory coupled to said bus; reconfiguring processor logic coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volumes, said source and destination logical volumes being defined on the disk array, and said reconfiguring processor logic including: first data transfer logic coupled to said bus for moving data from said source logical volume to said posting memory said data being moved one transfer unit at a time; second data transfer logic coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; host request receiving logic coupled to said bus for receiving a host request from the host computer, said host request asserted for specified blocks of data; determining logic coupled to said host request receiving logic for determining if said requested blocks are located in said source logical volume or said destination logical volume; and indicator logic coupled to said determining logic for pointing said host request to the appropriate one of said source and destination logical volumes, wherein said source logical volume has a first stripe size and said destination logical volume has a second stripe size, and wherein said transfer unit has a size equal to the least common denominator of said first and second stripe sizes.

Claim 65

A computer system comprising: a host computer; a disk array; a disk controller for transferring data between a disk array and a host computer, the disk controller comprising: a bus; a posting memory coupled to said bus; reconfiguring processor logic coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volumes, said source and destination logical volumes being defined on the disk array, and said reconfiguring processor logic including: first data transfer logic coupled to said bus for moving data from said source logical volume to said posting memory said data being moved one transfer unit at a time; second data transfer logic coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; host request receiving logic coupled to said bus for receiving a host request from the host computer, said host request asserted for specified blocks of data; determining logic coupled to said host request receiving logic for determining if said requested blocks are located in said source logical volume or said destination logical volume; and indicator logic coupled to said determining logic for pointing said host request to the appropriate one of said source and destination logical volumes, wherein said source logical volume has a first stripe size and said destination logical volume has a second stripe size, and wherein said transfer unit has a size equal to the least common denominator of said first and second stripe sizes.

Claim 66

The computer system of claim 54, wherein said source logical volume has a first stripe and a last stripe and wherein said destination logical volume has a first stripe and a last stripe, wherein the source logical volume is defined on a first number of disk drives and the destination logical volume is defined on a second number of disk drives, and wherein said reconfiguring processor logic further includes: determining logic coupled to said bus for determining if said first number of disk drives is greater than said second number of disk drives, wherein, if said first number is greater than said second number, said first data transfer logic proceeds in a direction from said last source volume stripe to said first source volume stripe, and said second data transfer logic proceeds in a direction from said last destination volume stripe to said first destination volume stripe, and wherein, if said first number is not greater than said second number, said first data transfer logic proceeds in a direction from said first source volume stripe to said last source volume stripe, and said second data transfer logic proceeds in a direction from said first destination volume stripe to said last destination volume stripe.

Claim 67

The computer system of claim 55, wherein said size of said transfer unit moved to said last destination volume stripe is less than or equal to said second stripe size, said size of said transfer unit in said last destination volume stripe being dependent upon the relationship between said first stripe size and said second stripe size.

Claim 68

A computer system comprising: a host computer; a disk array; a disk controller for transferring data between a disk array and a host computer, the disk controller comprising: a bus; a posting memory coupled to said bus; reconfiguring processor logic coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volume, said source and destination logical volumes being defined on the disk array, and said reconfiguring processor logic including: first data transfer logic coupled to said bus for moving data from said source logical volume to said posting memory, said data being moved one transfer unit at a time; second data transfer logic coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; host request receiving logic coupled to said bus for receiving a host request from the host computer, said host request asserted for specified blocks of data; determining logic coupled to said host request receiving logic for determining if said requested blocks are located in said source logical volume or said destination logical volume; and indicator logic coupled to said determining logic for pointing said host request to the appropriate one of said source and destination logical volumes, wherein said reconfiguring processor logic further includes: reconfigure request receiving logic coupled to said bus for receiving reconfigure requests from said host computer, a queue coupled to said reconfigure request receiving logic, said reconfigure requests being entered into said queue, wherein said reconfiguring processor logic is activated if a reconfigure request is pending in said queue.

Claim 69

A computer system comprising: a host computer; a disk array; a disk controller for transferring data between a disk array and a host computer, the disk controller comprising: a bus; a posting memory coupled to said bus; reconfiguring processor logic coupled to said bus for reconfiguring the disk array, wherein a source logical volume is reconfigured to a destination logical volume, said source and destination logical volumes being defined on the disk array, and said reconfiguring processor logic including: first data transfer logic coupled to said bus for moving data from said source logical volume to said posting memory, said data being moved one transfer unit at a time; second data transfer logic coupled to said bus for moving said source logical volume data from said posting memory to said destination logical volume after one transfer unit of data has been moved to said posting memory; host request receiving logic coupled to said bus for receiving a host request from the host computer, said host request asserted for specified blocks of data; determining logic coupled to said host request receiving logic for determining if said requested blocks are located in said source logical volume or said destination logical volume; and indicator logic coupled to said determining logic for pointing said host request to the appropriate one of said source and destination logical volumes, wherein said reconfiguring processor logic further includes: reconfigure request receiving logic coupled to said bus for receiving reconfigure requests from said host computer, a queue coupled to said reconfigure request receiving logic, said reconfigure requests being entered into said queue, wherein said reconfiguring processor logic is activated if a reconfigure request is pending in said queue.

Claim 70

The computer system of claim 57, wherein said reconfiguring processor logic further includes: abort request receiving logic coupled to said bus for receiving an abort request issued by said host computer; and request removal logic coupled to said abort request receiving logic for removing a reconfigure request from said queue to abort said reconfigure request.