Computer system for automatically reconfigurating memory space to avoid overlaps of memory reserved for expansion slots

Claim 1

A computer system comprising a main circuit board including a central processing unit and slots each with means for receiving a printed circuit board card, memory coupled to said central processing unit (CPU) to receive addresses of memory locations from said CPU and to provide data to said CPU, said memory being disposed on at least one of said main circuit board and said card, said main circuit board including input-output circuitry coupled to said memory to provide data to said memory and coupled to said CPU to receive control signals from said CPU, said main circuit board having less than 16 slots, said main circuit board including a 32 bit address bus being coupled to said CPU and to said memory to address said memory, said CPU including an address generation means for generating 2 32 different addresses ranging from location %0000 0000 to location $FFFF FFFF, said location being in hexadecimal notation, each of said slots having a distinct number in said system and being coupled to said bus for addressing said memory, each of said slots being coupled to distinct identification line means on said main circuit board, each of said distinct identification line means providing a distinct, unchanging signal to the slot to which said distinct identification line means is coupled, said distinct signal for a particular slot identifying the distinct number of said particular slot, where said distinct number of a particular slot is (ID), said distinct number resrving 256 megabytes of memory space for each of said slots such that said 256 megabyte memory space beings at location $(ID)000 0000 and ends at location $(ID)FFF FFFF, whereby any card in slot X will have memory space reserved beginning at location $X000 0000 and ending at location $XFFF FFFF, said locations being in hexadecimal notation.