Selectively doped channel region for increased IDsat and method for making same

Abstract

Abstract A selectively doped MOS transistor channel includes a deep impurity distribution and shallow impurity distribution. The deep impurity distribution is formed within high energy implant with an impurity of conductivity type opposite to the conductivity type of the source/drain regions of the transistor. In the n-channel regions, the deep impurity distribution preferably includes boron ions. The deep impurity distribution acts as a channel stop such that adjacent source/drain regions of the like type transistors are not inadvertently coupled during circuit operation. The shallow impurity distribution acts as a threshold implant by precisely controlling the doping of the transistor channel in the vicinity of the silicon oxide interface. The peak concentration of the shallow impurity distribution is located at a depth below the silicon surface which is greater than a depth typically associated with a threshold adjust implant. Because the impurity concentration of the shallow impurity distribution drops off rapidly from the peak concentration value, the concentration at the upper surface of the silicon substrate is not significantly greater than the doping of the silicon substrate itself. The light doping in the channel region of the transistor results in a substantially reduced threshold voltage for the transistor. Preferably, the threshold voltage of both the n-channel and p-channel devices has an absolute value of approximately 250 Mv. The lower threshold voltage translates into a higher I Dsat when the transistor is operated under normal conditions (e.g., V Gs =3 volts, V Ds =3 volts, and V sb =0 volts.)

Inventors

• 👤 Mark I. Gardner
• 👤 H. Jim Fulford, Jr.
• 👤 Fred N. Hause

Bibliographic Details