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US5801989A Expired / Lapsed US ⏱️ 0.0 years remaining

Method and apparatus for optimizing erase and program times for a non-volatile memory device

Assignee: Samsung Electronics Co Ltd
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Filing: 1996-12-09
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Granted: 1998-09-01
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Expires: 2016-12-09
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Abstract

Abstract A nonvolatile semiconductor memory device optimizes the time required for erasing or programming a cell by determining an optimal initial programming voltage. The initial programming voltage is relatively low and is fixed in the device during a test mode operation. During a normal erasing or programming operation, a programming signal having the initial programming voltage level is applied to the cell. The programmed state of the cell is then checked. If the cell did not program successfully, the voltage of the programming signal is increased and another programming cycle is executed. The programming cycle is repeated until the cell is programmed properly or a maximum number of programming cycles is reached. To determine the optimal initial programming voltage, an automatic programming operation is performed using a relatively low voltage programming signal. If the time required to complete the programming operation exceeds a target programming time, the voltage of the programming signal is repetitively increased, and the programming operation is repeated until the time required for the programming operation is less than the target time. The optimal initial voltage level of the programming signal is then fixed in the memory device by selectively cutting fuses in a trimming address register in a programming circuit which also includes a loop counter for counting the number of programming cycles during a programming operation and a programming signal generator that varies the voltage of the programming signal responsive to a control signal from the loop counter.

Inventors

  • 👤 Sung-Soo Lee
  • 👤 Jin-Ki Kim

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 15:11
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/34; G11C16/3436; G11C16/3454; G11C16/3459; G11C16/10; G11C16/30; G11C29/00; G11C29/02; G11C29/028; G11C29/04; G11C29/50; G11C29/50012; G11C29/52; G11C16/04; G11C2029/5004

Claims Analysis

Total Claims: 28
Claim 1
Independent Claim 99 words
A method for programming a nonvolatile semiconductor memory cell comprising: applying a programming signal having a relatively low voltage to the cell; checking the state of the cell; (a) changing the voltage of the programming signal; (b) applying the changed programming signal to the cell; (c) rechecking the state of the cell; repeating steps (a), (b) and (c) responsive to the state of the cell; and limiting the number of times the voltage is changed including incrementing a counter each time the voltage is changed and repeating steps (a), (b) and (c) until the counter reaches a maximum value.
Claim 2
Independent Claim 99 words
A method for programming a nonvolatile semiconductor memory cell comprising: applying a programming signal having a relatively low voltage to the cell; checking the state of the cell; (a) changing the voltage of the programming signal; (b) applying the changed programming signal to the cell; (c) rechecking the state of the cell; repeating steps (a), (b) and (c) responsive to the state of the cell; and limiting the number of times the voltage is changed including incrementing a counter each time the voltage is changed and repeating steps (a), (b) and (c) until the counter reaches a maximum value.
Claim 3
Independent Claim 96 words
A method for programming a nonvolatile semiconductor memory cell comprising: applying a programing signal having a relatively low voltage to the cell; checking the state of the cell; determining an initial voltage for the programming signal including generating the programming signal, performing a programming operation on the cell using the programming signal, and determining the amount of time required to program the cell; (d) changing the voltage of the programming signal; (e) performing a programming operation on the cell using the changed programming signal; and (f) redetermining the amount of time required to program the cell.
Claim 4
Independent Claim 96 words
A method for programming a nonvolatile semiconductor memory cell comprising: applying a programing signal having a relatively low voltage to the cell; checking the state of the cell; determining an initial voltage for the programming signal including generating the programming signal, performing a programming operation on the cell using the programming signal, and determining the amount of time required to program the cell; (d) changing the voltage of the programming signal; (e) performing a programming operation on the cell using the changed programming signal; and (f) redetermining the amount of time required to program the cell.
Claim 5
Dependent Claim 25 words
A method according to claim 2 further including repeating steps (d), (e) and (f) responsive to the amount of time required to program the cell.
Claim 6
Independent Claim 45 words
A method for programming a nonvolatile semiconductor memory cell comprising: applying a programming signal having a relatively low voltage to the cell; checking the state of the cell; determining an initial voltage for the programming signal; and fixing the initial voltage for the programming signal.
Claim 7
Independent Claim 45 words
A method for programming a nonvolatile semiconductor memory cell comprising: applying a programming signal having a relatively low voltage to the cell; checking the state of the cell; determining an initial voltage for the programming signal; and fixing the initial voltage for the programming signal.
Claim 8
Independent Claim 74 words
A method for determining an initial programming voltage for programming a nonvolatile semiconductor memory cell comprising: generating a programming signal; performing a programming operation on the cell using the programming signal; determining the amount of time required to program the cell; (g) changing the voltage of the programming signal; (h) performing a programming operation on the cell using the changed programming signal; and (i) redetermining the amount of time required to program the cell.
Claim 9
Independent Claim 74 words
A method for determining an initial programming voltage for programming a nonvolatile semiconductor memory cell comprising: generating a programming signal; performing a programming operation on the cell using the programming signal; determining the amount of time required to program the cell; (g) changing the voltage of the programming signal; (h) performing a programming operation on the cell using the changed programming signal; and (i) redetermining the amount of time required to program the cell.
Claim 10
Dependent Claim 25 words
A method according to claim 5 wherein changing the voltage includes changing the voltage responsive to the amount of time required to program the cell.
Claim 11
Dependent Claim 40 words
A method according to claim 6 wherein changing the voltage responsive to the amount of time required to program the cell includes changing the voltage if the amount of time required to program the cell exceeds a target programming time.
Claim 12
Dependent Claim 25 words
A method according to claim 5 further including repeating steps (g), (h) and (i) responsive to the amount of time required to program the cell.
Claim 13
Dependent Claim 21 words
A method according to claim 5 wherein generating a programming signal includes generating a programming signal having a relatively low voltage.
Claim 14
Dependent Claim 13 words
A method according to claim 5 further including fixing the initial programming voltage.
Claim 15
Dependent Claim 55 words
A nonvolatile semiconductor memory device comprising: a loop counter for counting programming cycles and generating a voltage control signal responsive to the number of cycles counted; and a programming signal generator coupled to the loop counter to generate a programming signal, wherein the voltage of the programming signal changes responsive to the voltage control signal.
Claim 16
Dependent Claim 55 words
A nonvolatile semiconductor memory device comprising: a loop counter for counting programming cycles and generating a voltage control signal responsive to the number of cycles counted; and a programming signal generator coupled to the loop counter to generate a programming signal, wherein the voltage of the programming signal changes responsive to the voltage control signal.
Claim 17
Dependent Claim 33 words
A memory device according to claim 11 wherein the loop counter generates the voltage control signal so as to set an initial voltage level of the programming signal responsive to a setting signal.
Claim 18
Dependent Claim 21 words
A memory device according to claim 12 further including a register coupled to the loop counter for generating the setting signal.
Claim 19
Dependent Claim 23 words
A memory device according to claim 13 wherein the register generates the setting signal responsive to an address signal during a test mode.
Claim 20
Dependent Claim 17 words
A memory device according to claim 13 wherein the register includes fuses for fixing the setting signal.
Claim 21
Dependent Claim 48 words
A memory device according to claim 11 wherein the loop counter includes: a trimming counter for generating a counter output signal responsive to a loop pulse signal; and a trimming decoder coupled to the trimming counter for generating the voltage control signal responsive to the counter output signal.
Claim 22
Dependent Claim 75 words
A memory device according to claim 11 wherein the programming signal generator includes: a charge pump for generating the programming signal responsive to a charge pumping signal; a level detector coupled to the charge pump to divide the voltage of the programming signal responsive to the voltage control signal; and a controller coupled between the charge pump and the level detector for generating the charge pumping signal responsive to the voltage of the programming signal.
Claim 23
Dependent Claim 54 words
A memory device according to claim 17 wherein the level detector includes: a plurality of resistors coupled in series so as to divide the voltage of the programming signal; and a transistor coupled to the plurality of resistors so as to bypass one of the plurality of resistors responsive to the voltage control signal.
Claim 24
Dependent Claim 27 words
A method according to claim 1 wherein changing the voltage responsive to the state of the cell includes changing the voltage if the cell is not programmed.
Claim 25
Dependent Claim 21 words
A method according to claim 19 further including repeating steps (a), (b) and (c) responsive to the state of the cell.
Claim 26
Independent Claim 58 words
A method for programming a nonvolatile semiconductor memory cell comprising: counting programming cycles; generating a voltage control signal responsive to the number of programming cycles counted; generating a programming signal wherein the voltage of the programming signal changes responsive to the voltage control signal; and programming a memory cell by applying the programming signal to the memory cell.
Claim 27
Independent Claim 58 words
A method for programming a nonvolatile semiconductor memory cell comprising: counting programming cycles; generating a voltage control signal responsive to the number of programming cycles counted; generating a programming signal wherein the voltage of the programming signal changes responsive to the voltage control signal; and programming a memory cell by applying the programming signal to the memory cell.
Claim 28
Dependent Claim 43 words
The method of claim 21 including: generating the programming signal responsive to a charge pump signal; dividing the voltage of the programming signal responsive to the voltage control signal; and generating the charge pump signal responsive to the voltage of the programming signal.

References Cited (Backward Citations)

US5440505A Cited
US5615147A Cited
US5511021A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-08-31 2002-03-02 2002-09-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-08-31 2006-03-02 2006-09-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-08-31 2010-03-02 2010-09-01 $7700.00 Window Closed / Lapsed

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