US5801576A
Expired / Lapsed
US
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Semiconductor integrated circuit device having a hierarchical power source configuration
Assignee: Renesas Electronics Corp
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Filing: 1997-10-24
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Granted: 1998-09-01
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Expires: 2017-10-24
Abstract
Abstract A main source voltage transmission line for transmitting a source voltage VCH as one power source and a sub source voltage transmission line are provided corresponding to a gate circuit. A resistive element having a high resistance is provided between the main source voltage transmission line and the sub source voltage transmission line. A capacitor comprised of an insulated gate field effect transistor is connected to the sub source voltage transmission line. The gate circuit is operated with a voltage on the sub source voltage transmission line as an operating source voltage. Thus, the voltage on the sub source voltage transmission line can be maintained at a voltage level that balances with a sub-threshold current flowing through the gate circuit, and the voltage on the sub source line can be stably maintained by the capacitor. A semiconductor memory device can be realized which reduces the sub-threshold current that flows upon standby of the gate circuit and minimizes a difference in voltage between the sub source voltage transmission line and the main source voltage transmission line to operate at high speed with low current consumption.
Inventors
- 👤 Tsukasa Ooishi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 15:13
CPC Classifications
G; G11; G11C; G11C7/00; G11C7/14; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/4063; G11C11/407; G11C11/4074; G11C11/408; G11C11/4085; G11C11/409; G11C11/4094; G11C5/00; G11C5/14; G11C5/145; G11C5/146; G11C5/147; G11C7/06; G11C7/065; G11C8/00; G11C8/14; H; H03; H03K; H03K19/00; H03K19/0008; H03K19/0013; H03K19/0016
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
121 words
A semiconductor integrated circuit device comprising: a main voltage transmission node for supplying a voltage of a first logic level: a sub voltage transmission node; a voltage supply node for supplying a voltage of a second logic level; a logic gate receiving a voltage on said sub voltage transmission node and a voltage on said voltage supply node both as operating source voltages to perform a predetermined logic process on a received signal for outputting; and a variable conductance element connected between said sub voltage transmission node and said main voltage transmission node and coupled to have a conductance value thereof increased in accordance with a transition of a signal outputted from said logic gate being to the first logic level.
Claim 2
Dependent Claim
121 words
A semiconductor integrated circuit device comprising: a main voltage transmission node for supplying a voltage of a first logic level: a sub voltage transmission node; a voltage supply node for supplying a voltage of a second logic level; a logic gate receiving a voltage on said sub voltage transmission node and a voltage on said voltage supply node both as operating source voltages to perform a predetermined logic process on a received signal for outputting; and a variable conductance element connected between said sub voltage transmission node and said main voltage transmission node and coupled to have a conductance value thereof increased in accordance with a transition of a signal outputted from said logic gate being to the first logic level.
Claim 3
Dependent Claim
31 words
The semiconductor integrated circuit device as claimed in claim 1, wherein said variable conductance element comprises a depletion type insulated gate field effect transistor having a gate receiving said signal outputted.
Claim 4
Dependent Claim
76 words
The semiconductor integrated circuit device as claimed in claim 1, further comprising: an insulated gate type field effect transistor having a threshold voltage and connected between said main voltage transmission node and said sub voltage transmission node, said insulated gate field effect transistor having a gate supplied with a voltage between the sum of a voltage on said main voltage transmission node and the threshold voltage, and the voltage on the said main voltage transmission node.
Claim 5
Dependent Claim
78 words
The semiconductor integrated circuit device as claimed in claim 1, further comprising: a second main voltage transmission line for transmitting the voltage of the second logic level; and a second variable conductance element provided between said second main voltage transmission line and said voltage supply node, said second variable conductance element being coupled to have a conductance value increased in accordance with a transition of the output signal of said logic gate being to the second logic level.
Claim 6
Dependent Claim
81 words
The semiconductor integrated circuit device as claimed in claim 4, further comprising: an insulated gate type field effect transistor having a threshold voltage and connected between said second main voltage transmission line and said voltage supply node, said insulated gate type field effect transistor having a gate supplied with a level of a voltage between the sum of a voltage on said second main voltage transmission line and the threshold voltage, and the voltage on said second main voltage transmission line.
Claim 7
Dependent Claim
33 words
The semiconductor integrated circuit device as claimed in claim 4, wherein said second variable conductance element comprises a depletion type insulated gate type field effect transistor having a gate receiving said output signal.
Claim 8
Dependent Claim
102 words
A semiconductor integrated circuit device according to claim 1, wherein said variable conductance means comprises, an insulated gate type field effect transistor connected between said main voltage transmission node and said sub voltage transmission node, and having a gate connected to said sub voltage transmission node, said insulated gate type field effect transistor causing a punchthrough phenomenon when the difference between a voltage on said main voltage transmission node and the voltage on said sub voltage transmission node reaches a predetermined value or greater in accordance with the transition of the output signal of said logic gate to the first logic level.
Claim 9
Dependent Claim
121 words
The semiconductor integrated circuit device as claimed in claim 7, further comprising: a second main voltage transmission node for supplying the voltage of the second logic level; and a second insulated gate field effect transistor having one conduction electrode node connected to said voltage supply node, another conduction electrode node connected to said second main voltage transmission node and a gate electrode node connected to said voltage supply node, said second insulated gate field effect transistor causing a punchthrough phenomenon when the difference between the voltage on said voltage supply node and a voltage on said second main voltage transmission node reaches a predetermined value or greater in accordance with the transition of said output signal to the second logic level.
Claim 10
Dependent Claim
40 words
The semiconductor integrated circuit device as recited in claim 1, wherein said variable conductance means comprises a variable resistance element having a resistance value thereof reduced while the output signal of said logic gate is at the first logic level.
Claim 11
Dependent Claim
41 words
The semiconductor integrated circuit device as recited in claim 4, wherein said second variable conductance means comprises a variable resistance element having a resistance value thereof reduced while the output signal of said logic gate is at the second logic level.
Claim 12
Dependent Claim
48 words
The semiconductor integrated circuit device as recited in claim 7, wherein said logic gate includes a field effect transistor of the insulated gate type having a first gate length, and said insulated gate type field effect transistor has a second gate length shorter than said first gate length.
Claim 13
Dependent Claim
49 words
The semiconductor integrated circuit device as recited in claim 8, wherein said logic gate includes a field effect transistor of the insulated gate type having a first gate length, and said second insulated gate type field effect transistor has a second gate length shorter than said first gate length.
References Cited (Backward Citations)
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