US5798664A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Offset cancelling amplifier circuit having Miller integrator as offset detector
Assignee: NEC Corp
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Filing: 1996-04-05
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Granted: 1998-08-25
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Expires: 2016-04-05
Abstract
Abstract In an optical receiver, an offset cancelling amplifier comprises a limiting amplifier for amplifying an input signal while preventing amplified amplitude from exceeding a predetermined level to provide an output signal, an offset detector for detecting an offset in the output signal to produce a detection signal representative of the offset amount detected, and an offset controller coupled in the input circuit of the limiting amplifier and the offset detector for controlling an input voltage of the limiting amplifier in response to the detection signal to reduce the offset in the output signal. In order to widen the dynamic range and lower the low-frequency cutoff of the offset cancelling amplifier, the offset detector comprises a Miller integrator.
Inventors
- 👤 Takeshi Nagahori
- 👤 Ichiro Hatakeyama
- 👤 Soichiro Araki
- 👤 Kazunori Miyoshi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 10:27
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45479; H03F3/45928; H03F3/45932; H03F3/45937; H03F3/45941; H03F3/04; H03F3/08; H03F3/087; H03F3/45968; H03F3/45973; H03F2203/00; H03F2203/45; H03F2203/45511; H03F2203/45526
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
104 words
An offset cancelling amplifier circuit comprising; a limiting amplifier having an input for amplifying an input signal incoming through said input while preventing amplified amplitude from exceeding a predetermined level to provide an output signal; an offset detector comprising only one Miller integrator for detecting an offset in said output signal to produce a detection signal representative of the offset amount detected; and an offset controller coupled between said input of said limiting amplifier and said detection signal of said offset detector for controlling said input of said limiting amplifier in response to said detection signal to reduce said offset in said output signal.
Claim 2
Dependent Claim
104 words
An offset cancelling amplifier circuit comprising; a limiting amplifier having an input for amplifying an input signal incoming through said input while preventing amplified amplitude from exceeding a predetermined level to provide an output signal; an offset detector comprising only one Miller integrator for detecting an offset in said output signal to produce a detection signal representative of the offset amount detected; and an offset controller coupled between said input of said limiting amplifier and said detection signal of said offset detector for controlling said input of said limiting amplifier in response to said detection signal to reduce said offset in said output signal.
Claim 3
Dependent Claim
19 words
An offset cancelling amplifier circuit as claimed claim 1, wherein said limiting amplifier comprises at least one differential amplifier.
Claim 4
Dependent Claim
17 words
An offset cancelling amplifier circuit as claimed in claim 1, wherein said offset controller comprises a subtractor.
Claim 5
Dependent Claim
26 words
An offset cancelling amplifier circuit as claimed in claim 1, wherein said offset cancelling amplifier circuit is an integrated circuit formed on a single common chip.
Claim 6
Dependent Claim
148 words
An optical receiver circuit comprising: a photodetector section responsive to an optical signal for converting the optical signal into an input current signal; a pre-amplifier section comprising at least one pre-amplifier responsive to the input current signal for converting the input current signal into an input voltage signal; a limiting amplifier having an input for amplifying the input voltage signal incoming through said input while preventing amplified amplitude from exceeding a predetermined level to provide an output signal; an offset detector comprising only one Miller integrator for detecting an offset in said output signal to produce a detection signal representing an offset amount detected; and an offset controller coupled between said input of said limiting amplifier and said detection signal of said offset detector for controlling said input of said limiting amplifier in response to said detection signal to reduce or cancel said offset in said output signal.
Claim 7
Dependent Claim
148 words
An optical receiver circuit comprising: a photodetector section responsive to an optical signal for converting the optical signal into an input current signal; a pre-amplifier section comprising at least one pre-amplifier responsive to the input current signal for converting the input current signal into an input voltage signal; a limiting amplifier having an input for amplifying the input voltage signal incoming through said input while preventing amplified amplitude from exceeding a predetermined level to provide an output signal; an offset detector comprising only one Miller integrator for detecting an offset in said output signal to produce a detection signal representing an offset amount detected; and an offset controller coupled between said input of said limiting amplifier and said detection signal of said offset detector for controlling said input of said limiting amplifier in response to said detection signal to reduce or cancel said offset in said output signal.
Claim 8
Dependent Claim
19 words
An optical receiver circuit as claimed in claim 5, wherein said limiting amplifier comprises at least one differential amplifier.
Claim 9
Dependent Claim
16 words
An optical receiver circuit as claimed in claim 5, wherein said offset controller comprises a subtractor.
Claim 10
Dependent Claim
148 words
A polarity converter circuit for converting a unipolar input current pulse signal into a bipolar input voltage pulse signal, comprising: a pre-amplifier section including at least one pre-amplifier for converting the unipolar input current pulse signal into unipolar input voltage pulse signal; a limiting amplifier having an input for amplifying the unipolar input voltage pulse signal incoming through said input while preventing amplified amplitude from exceeding a predetermined level to produce an output signal of a bipolar voltage pulse signal; an offset detector comprising only one Miller integrator for detecting an offset in said output signal to produce a detection signal representative of the offset amount detected; and an offset controller coupled between said input of said limiting amplifier and said detection signal of said offset detector for controlling said input of said limiting amplifier in response to said detection signal reduce said offset in said output signal.
Claim 11
Dependent Claim
148 words
A polarity converter circuit for converting a unipolar input current pulse signal into a bipolar input voltage pulse signal, comprising: a pre-amplifier section including at least one pre-amplifier for converting the unipolar input current pulse signal into unipolar input voltage pulse signal; a limiting amplifier having an input for amplifying the unipolar input voltage pulse signal incoming through said input while preventing amplified amplitude from exceeding a predetermined level to produce an output signal of a bipolar voltage pulse signal; an offset detector comprising only one Miller integrator for detecting an offset in said output signal to produce a detection signal representative of the offset amount detected; and an offset controller coupled between said input of said limiting amplifier and said detection signal of said offset detector for controlling said input of said limiting amplifier in response to said detection signal reduce said offset in said output signal.
Claim 12
Dependent Claim
19 words
A polarity converter circuit as claimed in claim 8, wherein said limiting amplifier comprises at least one differential amplifier.
Claim 13
Dependent Claim
16 words
A polarity converter circuit as claimed in claim 8, wherein said offset controller comprises a subtractor.
Claim 14
Dependent Claim
24 words
A polarity converter circuit as claimed in claim 8, wherein said polarity converter circuit is an integrated circuit formed on a single common chip.
Claim 15
Dependent Claim
155 words
An optical receiver circuit comprising: a photodetector section responsive to an optical signal for converting the optical signal into a unipolar input current pulse signals; a pre-amplifier section comprising at least one pre-amplifier for converting the unipolar input current pulse signal into a unipolar input voltage pulse signal; a limiting amplifier having an input for amplifying the unipolar input voltage pulse signal incoming through said input while preventing amplified amplitude from exceeding a predetermined level to produce an output signal of a bipolar voltage pulse signal; an offset detector comprising only one Miller integrator for detecting an offset in said output signal to produce a detection signal representative of the offset amount detected; and an offset controller coupled between said input of said limiting amplifier and said detection signal of said offset detector for controlling said input of said limiting amplifier in response to said detection signal to reduce said offset in said output signal.
Claim 16
Dependent Claim
155 words
An optical receiver circuit comprising: a photodetector section responsive to an optical signal for converting the optical signal into a unipolar input current pulse signals; a pre-amplifier section comprising at least one pre-amplifier for converting the unipolar input current pulse signal into a unipolar input voltage pulse signal; a limiting amplifier having an input for amplifying the unipolar input voltage pulse signal incoming through said input while preventing amplified amplitude from exceeding a predetermined level to produce an output signal of a bipolar voltage pulse signal; an offset detector comprising only one Miller integrator for detecting an offset in said output signal to produce a detection signal representative of the offset amount detected; and an offset controller coupled between said input of said limiting amplifier and said detection signal of said offset detector for controlling said input of said limiting amplifier in response to said detection signal to reduce said offset in said output signal.
Claim 17
Dependent Claim
19 words
An optical receiver circuit as claimed in claim 12, wherein said limiting amplifier comprises at least one differential amplifier.
Claim 18
Dependent Claim
16 words
An optical receiver circuit as claimed in claim 12, wherein said offset controller comprises a subtractor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-08-24 | 2002-02-23 | 2002-08-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-08-24 | 2006-02-23 | 2006-08-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-08-24 | 2010-02-23 | 2010-08-25 | $7700.00 | Window Closed / Lapsed |