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US5485121A Expired / Lapsed US ⏱️ 0.0 years remaining

Amplifier arrangement with multipath miller zero cancellation

Assignee: US Philips Corp
•
Filing: 1994-06-21
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Granted: 1996-01-16
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Expires: 2014-06-21
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Abstract

Abstract An amplifier arrangement comprises an inverting transconductance stage having an input and an output; a capacitor coupled between the input and the output of the inverting transconductance stage; and signal current means having a first output coupled to the input of the inverting transconductance stage to provide a first signal current to the input of the inverting transconductance stage. The signal current means further comprises a second output coupled to the output of the inverting transconductance stage to provide a second signal current to the output of the inverting transconductance stage, which second signal current is substantially equal and in phase opposition to the first signal current. A second parallel path bypasses the Miller-compensated transconductance stage to eliminate the right half-plane zero of the Miller compensation.

Inventors

  • 👤 Johan H. Huijsing
  • 👤 Rudolphe G. H. Eschauzier

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 00:18
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45076; H03F3/45179; H03F3/45183; H03F3/45475; H03F1/00; H03F1/08; H03F1/083; H03F1/086; H03F3/4508; H03F3/45085

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 108 words
An amplifier arrangement comprising: an inverting transconductance stage having an input and an output; a capacitor coupled between the input and the output of the inverting transconductance stage; and signal current means having a first output coupled to the input of the inverting transconductance stage to provide a first signal current to the input of the inverting transconductance stage, characterized in that the signal current means further comprises a second output coupled to the output of the inverting transconductance stage to provide a second signal current to the output of the inverting transconductance stage, which second signal current is substantially in phase opposition to the first signal current.
Claim 2
Dependent Claim 108 words
An amplifier arrangement comprising: an inverting transconductance stage having an input and an output; a capacitor coupled between the input and the output of the inverting transconductance stage; and signal current means having a first output coupled to the input of the inverting transconductance stage to provide a first signal current to the input of the inverting transconductance stage, characterized in that the signal current means further comprises a second output coupled to the output of the inverting transconductance stage to provide a second signal current to the output of the inverting transconductance stage, which second signal current is substantially in phase opposition to the first signal current.
Claim 3
Dependent Claim 25 words
An amplifier arrangement as claimed in claim 1, characterized in that the second signal current is substantially equal in magnitude to the first signal current.
Claim 4
Dependent Claim 49 words
An amplifier arrangement as claimed in claim 1, characterized in that the signal current means comprises a second transconductance stage having an input, a non-inverting output coupled to the input of the inverting transconductance stage, and an inverting output coupled to the output of the inverting transconductance stage (8).
Claim 5
Dependent Claim 100 words
An amplifier arrangement as claimed in claim 3, characterized in that the amplifier arrangement further comprises a second capacitor (24) coupled between the output (6) of the inverting transconductance stage (6) and the input (22) of the second transconductance stage (14); and a third transconductance stage (26) having an input (28), a first non-inverting output (30) coupled to the non-inverting output (16) of the second transconductance stage (14), a second non-inverting output (32) coupled to the input (22) of the second transconductance stage (14) and an inverting output (34) coupled to the output (6) of the inverting transconductance stage (8).

References Cited (Backward Citations)

US4354162A Cited
US4502017A Cited
US5155447A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-01-15 1999-07-17 2000-01-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-01-15 2003-07-17 2004-01-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-01-15 2007-07-17 2008-01-16 $7700.00 Window Closed / Lapsed

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