US5798557A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Lid wafer bond packaging and micromachining
Assignee: Intersil Americas LLC
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Filing: 1996-08-29
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Granted: 1998-08-25
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Expires: 2016-08-29
Abstract
Abstract A wafer level hermetically packaged integrated circuit has a protective cover wafer bonded to a semiconductor device substrate wafer. The substrate wafer may contain a cavity. The cover wafer seals integrated circuits and other devices including but not limited to air bridge structures, resonant beams, surface acoustic wave (SAW) devices, trimmable resistors, and micromachines. Some devices, such as SAWs, are formed on the surface of cavities formed in the protective cover wafer. Die are separated to complete the process.
Inventors
- 👤 Matthew M. Salatino
- 👤 William R. Young
- 👤 Patrick A. Begley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 08:54
CPC Classifications
B; B81; B81C; B81C1/00; B81C1/00015; B81C1/00261; B81C1/00333; H; H10; H10W; H10W76/00; H10W76/10; H10W76/17; H10W76/18; B29; B29C; B29C43/00; B29C43/32; B29C43/36; H03; H03H; H03H9/00; H03H9/02; H03H9/05; H03H9/0538; H03H9/0547; H10F; H10F39/00; H10F39/80; H10F39/804; H10W42/00; H10W42/121; H10W42/20; H10W76/60; B29C33/00; B29C33/0022; B81C2203/00; B81C2203/01; B81C2203/0109; B81C2203/0118; B81C2203/0127
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
88 words
A packaged integrated circuit comprising: a semiconductor substrate comprising a first portion and a second portion on one side of the substrate; at least one device formed therein on said first portion; a protective cover bonded to the first portion semiconductor device substrate for sealing and covering the at least one device formed herein; and at least one electrical bond pad on the second portion of the semiconductor substrate, each said bond pad located outside the protective cover and electrically connected to the device in the semiconductor substrate.
Claim 2
Dependent Claim
88 words
A packaged integrated circuit comprising: a semiconductor substrate comprising a first portion and a second portion on one side of the substrate; at least one device formed therein on said first portion; a protective cover bonded to the first portion semiconductor device substrate for sealing and covering the at least one device formed herein; and at least one electrical bond pad on the second portion of the semiconductor substrate, each said bond pad located outside the protective cover and electrically connected to the device in the semiconductor substrate.
Claim 3
Dependent Claim
21 words
The packaged integrated circuit of claim 1 wherein the semiconductor device substrate comprises a cavity for holding at least one device.
Claim 4
Dependent Claim
22 words
The packaged integrated circuit of claim 1 wherein the cover hermetically seals the at least one device in the semiconductor device substrate.
Claim 5
Dependent Claim
29 words
The packaged integrated circuit of claim 3 wherein the protective cover comprises a material selected from the group consisting of silicon, germanium, silicon germanium, gallium arsenide, glass and quartz.
Claim 6
Dependent Claim
29 words
The packaged integrated circuit of claim 1 wherein the device comprises a surface acoustic wave device on the surface of the protective cover opposite the at least one device.
Claim 7
Dependent Claim
20 words
The packaged integrated circuit of claim 1 wherein the protective cover is transparent to a first spectrum of electromagnetic radiation.
Claim 8
Dependent Claim
20 words
The packaged integrated circuit of claim 6 wherein the protective cover is opaque to a second spectrum of electromagnetic radiation.
Claim 9
Dependent Claim
20 words
The packaged integrated circuit of claim 1 wherein the protective cover is colored to filter selected wavelengths of electromagnetic radiation.
Claim 10
Dependent Claim
13 words
The packaged integrated circuit of claim 1 wherein the protective cover is opaque.
Claim 11
Dependent Claim
17 words
The packaged integrated circuit of claim 1 wherein the cover comprises an outer layer of semiconductor material.
Claim 12
Dependent Claim
25 words
The packaged integrated circuit of claim 10 wherein the semiconductor is silicon and a portion of the silicon is oxidized to provide a transparent window.
Claim 13
Dependent Claim
15 words
The packaged integrated circuit of claim 1 wherein the circuit comprises an air bridge structure.
Claim 14
Dependent Claim
15 words
The packaged integrated circuit of claim 1 wherein the device substrate comprises a microelectronic structure.
Claim 15
Dependent Claim
14 words
The packaged integrated circuit of claim 1 wherein the circuit comprises a photosensitive element.
Claim 16
Dependent Claim
15 words
The packaged integrated circuit of claim 1 wherein the circuit comprises a trimmable resistor structure.
Claim 17
Dependent Claim
15 words
The packaged integrated circuit of claim 1 wherein the device substrate comprises a resonant beam.
References Cited (Backward Citations)
US5583373A
Cited
US5610431A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-08-24 | 2002-02-23 | 2002-08-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-08-24 | 2006-02-23 | 2006-08-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-08-24 | 2010-02-23 | 2010-08-25 | $7700.00 | Window Closed / Lapsed |