Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
187 words
A driver circuit of a light-emitting device comprising: a reference current source for generating a reference current; a cascode current source circuit for generating a driving current for said light-emitting device with the use of said reference current; an input circuit for switching said driving current according to a data signal; said cascode current source circuit having a first current mirror formed by first and second transistors and a second current mirror formed by third and fourth transistors; said first transistor of said first current mirror being supplied with a first constant current proportional to said reference current, and controlling said second transistor so that said driving current flows through said second transistor; said third transistor of said second current mirror being supplied with a second constant current proportional to said reference current, and generating a mirror current with respect to said second constant current; said second mirror current flowing through said fourth transistor as said driving current; said input circuit serving to turn on and off said fourth transistor according to said data signal, thereby controlling said output of said driving current to said light-emitting device.
Claim 2
Dependent Claim
187 words
A driver circuit of a light-emitting device comprising: a reference current source for generating a reference current; a cascode current source circuit for generating a driving current for said light-emitting device with the use of said reference current; an input circuit for switching said driving current according to a data signal; said cascode current source circuit having a first current mirror formed by first and second transistors and a second current mirror formed by third and fourth transistors; said first transistor of said first current mirror being supplied with a first constant current proportional to said reference current, and controlling said second transistor so that said driving current flows through said second transistor; said third transistor of said second current mirror being supplied with a second constant current proportional to said reference current, and generating a mirror current with respect to said second constant current; said second mirror current flowing through said fourth transistor as said driving current; said input circuit serving to turn on and off said fourth transistor according to said data signal, thereby controlling said output of said driving current to said light-emitting device.
Claim 3
Dependent Claim
46 words
A circuit as claimed in claim 1, wherein said first transistor of said first current mirror is supplied with said first constant current through a transistor; and wherein said third transistor of said second current mirror is supplied with said second constant current through another transistor.
Claim 4
Dependent Claim
53 words
A circuit as claimed in claim 1, wherein said first transistor of said first current mirror is supplied with said first constant current through a transistor; and wherein said third transistor of said second current mirror is supplied with said second constant current through the same transistor as that of said first transistor.
Claim 5
Dependent Claim
108 words
A circuit as claimed in claim 1, wherein said input circuit includes a timing circuit and fifth and sixth transistors; and wherein said fifth transistor serves as a switch for turning on or off the control of said fourth transistor of said second current mirror by said third transistor of said second current mirror; and wherein said fifth transistor is driven by a first timing signal from said timing circuit; and wherein said sixth transistor serves as a switch for turning on or off said fourth transistor of said second current mirror; and wherein said sixth transistor is driven by a second timing signal from said timing circuit.
Claim 6
Dependent Claim
18 words
A circuit as claimed in claim 4, wherein said first and second timing signals have a time delay.
Claim 7
Dependent Claim
45 words
A circuit as claimed in claims 4, wherein said timing circuit of said input circuit includes cascaded inverters; and wherein said first timing signal is derived from an output of said inverters, and said second timing signal is derived from another output of said inverters.
Claim 8
Dependent Claim
70 words
A circuit as claimed in claim 4, wherein each of said first to sixth transistors is a MOS transistor; and wherein said fifth MOS transistor of said input circuit has a gate length L5 and a gate width W5, and said sixth MOS transistor of said input circuit has a gate length L6 and a gate width W6; and wherein L5, W5, L6, and W6 satisfy a relationship of ##EQU12##
Claim 9
Dependent Claim
19 words
A circuit as claimed in claim 1, wherein each of said first to fourth transistors is a MOS transistor.
Claim 10
Dependent Claim
40 words
A circuit as claimed in claim 8, further comprising: a first capacitor connected to a gate and a source of said second MOS transistor; and a second capacitor connected to a gate and a source of said third MOS transistor.
Claim 11
Dependent Claim
79 words
A circuit as claimed in claim 8, wherein said fifth MOS transistor of said input circuit has a gate applied with said first timing signal, and a drain and a source connected to respective gates of said third and fourth MOS transistors; and wherein said sixth MOS transistor of said input circuit has a gate applied with said second timing signal, and a drain and a source connected between a gate and a source of said fourth MOS transistor.