Patent US5774022A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5774022A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital clock recovery loop

Assignee: Lockheed Martin Corp
•
Filing: 1996-08-29
•
Granted: 1998-06-30
•
Expires: 2016-08-29
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A communications system including a clock recovery circuit that extracts a clock signal from incoming digital data, the clock recovery circuit including a voltage controlled oscillator having a control node and having an output producing an output wave having a frequency that varies in response to a voltage applied to the control node; charge pump and loop filter circuitry that controls the rate of change of the voltage on the control node of the voltage controlled oscillator; a start-up circuit that performs frequency detection and, in conjunction with the charge pump and loop filter circuitry, adjusts the voltage on the control node of the voltage controlled oscillator; and a state machine that performs phase detection and adjusts the voltage on the control node of the voltage controlled oscillator.

Inventors

  • 👤 Dan M. Griffin
  • 👤 George E. Pax
  • 👤 James E. O'Toole

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 15:19
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/10; H03L7/113; H03L7/085; H03L7/089; H03L7/0891; H03L7/0895; H03L7/0896; H04; H04L; H04L7/00; H04L7/02; H04L7/033; H04B; H04B1/00; H04B1/69; H04B1/707

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 128 words
A communications system including a clock recovery circuit that extracts a clock signal from incoming digital data, the clock recovery circuit comprising: a voltage controlled oscillator having a control node and having an output producing an output wave having a frequency that varies in response to a voltage applied to the control node; charge pump and loop filter circuitry that controls the rate of change of the voltage on the control node of the voltage controlled oscillator; a start-up circuit that performs frequency discrimination and, in conjunction with the charge pump and loop filter circuitry, adjusts the voltage on the control node of the voltage controlled oscillator; and a state machine that performs phase control and adjusts the voltage on the control node of the voltage controlled oscillator.
Claim 2
Dependent Claim 128 words
A communications system including a clock recovery circuit that extracts a clock signal from incoming digital data, the clock recovery circuit comprising: a voltage controlled oscillator having a control node and having an output producing an output wave having a frequency that varies in response to a voltage applied to the control node; charge pump and loop filter circuitry that controls the rate of change of the voltage on the control node of the voltage controlled oscillator; a start-up circuit that performs frequency discrimination and, in conjunction with the charge pump and loop filter circuitry, adjusts the voltage on the control node of the voltage controlled oscillator; and a state machine that performs phase control and adjusts the voltage on the control node of the voltage controlled oscillator.
Claim 3
Dependent Claim 68 words
A communications system in accordance with claim 1 and further comprising bias circuitry applying an offset voltage to the voltage controlled oscillator such that, in the absence of any voltage applied to the control node, the frequency of the output wave produced by the voltage controlled oscillator is at least half and not greater than the final frequency of the voltage controlled oscillator when frequency lock is established.
Claim 4
Dependent Claim 31 words
A communications system in accordance with claim 1 wherein the state machine makes finer adjustments to the voltage on the control node of the voltage controlled oscillator than the start-up circuit.
Claim 5
Dependent Claim 16 words
A communications system in accordance with claim 1 wherein the start-up circuit is a digital circuit.
Claim 6
Dependent Claim 17 words
A communications system in accordance with claim 1 wherein the state machine is implemented by digital circuitry.
Claim 7
Dependent Claim 44 words
A communications system in accordance with claim 1 wherein the clock recovery circuit varies the output of the voltage controlled oscillator until a predetermined number of transitions of the output fit within a time interval of an identifiable discrete segment of the incoming data.
Claim 8
Dependent Claim 59 words
A communications system in accordance with claim 1 wherein the incoming data is direct spread spectrum data including a plurality of chips, and wherein clock recovery circuit varies the output of the voltage controlled oscillator until a predetermined number of transitions of the output fit within a time interval of a predetermined number of chips in the incoming data.
Claim 9
Dependent Claim 125 words
A clock recovery circuit that extracts a clock signal from an input digital signal, the clock recovery circuit comprising: a voltage controlled oscillator having a control node and having an output producing an output wave having a frequency that varies in response to a voltage applied to the control node; charge pump and loop filter circuitry that controls the rate of change of the voltage on the control node of the voltage controlled oscillator; a start-up circuit that performs frequency discrimination and, in conjunction with the charge pump and loop filter circuitry, adjusts the voltage on the control node of the voltage controlled oscillator; and a state machine that performs phase control and adjusts the voltage on the control node of the voltage controlled oscillator.
Claim 10
Dependent Claim 125 words
A clock recovery circuit that extracts a clock signal from an input digital signal, the clock recovery circuit comprising: a voltage controlled oscillator having a control node and having an output producing an output wave having a frequency that varies in response to a voltage applied to the control node; charge pump and loop filter circuitry that controls the rate of change of the voltage on the control node of the voltage controlled oscillator; a start-up circuit that performs frequency discrimination and, in conjunction with the charge pump and loop filter circuitry, adjusts the voltage on the control node of the voltage controlled oscillator; and a state machine that performs phase control and adjusts the voltage on the control node of the voltage controlled oscillator.
Claim 11
Dependent Claim 69 words
A clock recovery circuit in accordance with claim 8 and further comprising bias circuitry applying an offset voltage to the voltage controlled oscillator such that, in the absence of any voltage applied to the control node, the frequency of the output wave produced by the voltage controlled oscillator is at least half and not greater than the final frequency of the voltage controlled oscillator when frequency lock is established.
Claim 12
Dependent Claim 32 words
A clock recovery circuit in accordance with claim 8 wherein the state machine makes finer adjustments to the voltage on the control node of the voltage controlled oscillator than the start-up circuit.
Claim 13
Dependent Claim 17 words
A clock recovery circuit in accordance with claim 8 wherein the start-up circuit is a digital circuit.
Claim 14
Dependent Claim 18 words
A clock recovery circuit in accordance with claim 8 wherein the state machine is implemented by digital circuitry.
Claim 15
Dependent Claim 61 words
A clock recovery circuit in accordance with claim 8 wherein the input digital signal is direct spread spectrum data including a plurality of chips, and wherein clock recovery circuit varies the output of the voltage controlled oscillator until a predetermined number of transitions of the output fit within a time interval of a predetermined number of chips in the incoming data.
Claim 16
Dependent Claim 99 words
A phase lock loop receiving an oscillating input signal and producing an output signal, the phase lock loop comprising circuitry including a plurality of flip-flops which are chained together and used to determine time spacing between transitions to perform a frequency comparison of the output signal relative to the input signal, wherein the input signal is digital and the phase locked loop extracts a clock from the digital signal, the phase locked loop further comprising a control node, and a state machine that performs phase control and adjusts the voltage on the control node of the voltage controlled oscillator.
Claim 17
Dependent Claim 99 words
A phase lock loop receiving an oscillating input signal and producing an output signal, the phase lock loop comprising circuitry including a plurality of flip-flops which are chained together and used to determine time spacing between transitions to perform a frequency comparison of the output signal relative to the input signal, wherein the input signal is digital and the phase locked loop extracts a clock from the digital signal, the phase locked loop further comprising a control node, and a state machine that performs phase control and adjusts the voltage on the control node of the voltage controlled oscillator.
Claim 18
Dependent Claim 49 words
A communications system in accordance with claim 14 wherein the circuitry including the flip-flops makes adjustments to the voltage on the control node, and wherein the state machine makes finer adjustments to the voltage on the control node of the voltage controlled oscillator than the circuitry including the flip-flops.
Claim 19
Dependent Claim 68 words
A communications system in accordance with claim 14 and further comprising bias circuitry applying an offset voltage to the voltage controlled oscillator such that, in the absence of any voltage applied to the control node, the frequency of the output wave produced by the voltage controlled oscillator is at least half and not greater than the final frequency of the voltage controlled oscillator when frequency lock is established.
Claim 20
Dependent Claim 133 words
A communications system including a clock recovery circuit for extracting a clock signal from incoming digital data, the clock recovery circuit comprising: a voltage controlled oscillator having a control node and having an output configured to produce an output wave having a frequency that varies in response to a voltage applied to the control node; charge pump and loop filter circuitry configured to control the rate of change of the voltage on the control node of the voltage controlled oscillator; a start-up circuit configured to perform frequency discrimination and, in conjunction with the charge pump and loop filter circuitry, adjust the voltage on the control node of the voltage controlled oscillator; and a state machine configured to perform phase control and adjust the voltage on the control node of the voltage controlled oscillator.
Claim 21
Dependent Claim 133 words
A communications system including a clock recovery circuit for extracting a clock signal from incoming digital data, the clock recovery circuit comprising: a voltage controlled oscillator having a control node and having an output configured to produce an output wave having a frequency that varies in response to a voltage applied to the control node; charge pump and loop filter circuitry configured to control the rate of change of the voltage on the control node of the voltage controlled oscillator; a start-up circuit configured to perform frequency discrimination and, in conjunction with the charge pump and loop filter circuitry, adjust the voltage on the control node of the voltage controlled oscillator; and a state machine configured to perform phase control and adjust the voltage on the control node of the voltage controlled oscillator.
Claim 22
Dependent Claim 72 words
A communications system in accordance with claim 17 and further comprising bias circuitry configured to apply an offset voltage to the voltage controlled oscillator such that, in operation, in the absence of any voltage applied to the control node, the frequency of the output wave produced by the voltage controlled oscillator is at least half and not greater than the final frequency of the voltage controlled oscillator when frequency lock is established.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-06-29 2001-12-29 2002-06-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-06-29 2005-12-29 2006-06-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-06-29 2009-12-29 2010-06-30 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag