US5768187A
Expired / Lapsed
US
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Non-volatile multi-state memory device capable with variable storing resolution
Assignee: Sanyo Electric Co Ltd
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Filing: 1996-09-25
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Granted: 1998-06-16
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Expires: 2016-09-25
Abstract
Abstract This non-volatile multi-state memory device switches a storing resolution of multi-state data corresponding to digital data stored in a non-volatile memory cell according to the data's characteristics. In more detail, digital audio data are output from an ADPCM encoder in n-bit units and m bits of address data indicating an address at which audio data are stored are output from an address controller. These are then input to a switching circuit, a bit number converting circuit converts m bits of address data to n bits of address data at the same level as the m bit data, and the converted n bits of address data and n bits of audio data are inputted to a second multiplexer. An output of the Second multiplexer is then selected in compliance with a switch signal from the address controller and either the selected n bits of address data or the audio data are sent to a read-write circuit. Consequently, for example, writing is carried out with storing resolution deemed as 16 when 4 bits of audio data are stored in an EEPROM cell array and storing resolution deemed as 2 when for instance 1 bit of address data is stored.
Inventors
- 👤 Takashi Uchino
- 👤 Nozomu Nambu
- 👤 Akio Hagiwara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 17:24
CPC Classifications
G; G11; G11C; G11C16/00; G11C11/00; G11C11/56; G11C11/5621; G11C11/5628; G11C7/00; G11C7/16; G11C2211/00; G11C2211/56; G11C2211/564; G11C2211/5641; G11C2211/5644; G11C7/10; G11C7/1006
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
103 words
A non-volatile multi-state memory device capable of storing a plurality of digital data types as multi-state data in a non-volatile memory cell array, said memory device comprising: a switching circuit for switching storing resolution in accordance with the digital data type being stored, the storing resolution being switched for at least one of the data types by converting from digital data having a predetermined number of states, which number is less than the number of states of the multi-state data, to a predetermined multi-state data, so that all of the digital data types are stored in the memory cell array as multi-state data.
Claim 2
Dependent Claim
103 words
A non-volatile multi-state memory device capable of storing a plurality of digital data types as multi-state data in a non-volatile memory cell array, said memory device comprising: a switching circuit for switching storing resolution in accordance with the digital data type being stored, the storing resolution being switched for at least one of the data types by converting from digital data having a predetermined number of states, which number is less than the number of states of the multi-state data, to a predetermined multi-state data, so that all of the digital data types are stored in the memory cell array as multi-state data.
Claim 3
Dependent Claim
56 words
A non-volatile multi-state memory device according to claim 1, wherein the plurality of digital data types comprise a first type of digital data and a second type of digital data; and storing resolution of the second type of digital data has been reduced to lower than the storing resolution of the first type of digital data.
Claim 4
Dependent Claim
41 words
A non-volatile multi-state memory device according to claim 2, wherein the second type of digital data is an address data for indicating a storing address of the first type of digital data to be stored in the non-volatile memory cell array.
Claim 5
Dependent Claim
41 words
A non-volatile multi-state memory device according to claim 3, wherein the address data indicates at least one storing address of a storing start address and a storing stop address of first type of digital data in a non-volatile memory cell array.
Claim 6
Dependent Claim
20 words
A non-volatile multi-state memory device according to claim 3, wherein the first type digital data is an digital audio data.
Claim 7
Dependent Claim
153 words
A non-volatile multi-state memory device according to claim 2, wherein the first type of digital data consists of n-bit data (n: whole number greater than 2) and the second type of digital data consists of m-bit data (m:whole number<n); said memory device further comprising a writing circuit for writing n-bit inputted digital data in the non-volatile memory cell array as corresponding multi-state data; and wherein when a switch signal to be input is at a first level, the switching circuit outputs the n-bit first type of digital data unaltered to the writing circuit and wherein when the switch signal is at a second level, the switching circuit converts the m-bit second type of digital data to n-bit digital data of which at least the upper m-bit of the n-bit digital data is the m-bit second type of digital data and the said switching circuit outputs the n-bit digital data to the writing circuit.
Claim 8
Dependent Claim
81 words
A non-volatile multi-state memory device according to claim 6, wherein when the switch signal is at the second level, the switching circuit converts the m-bit second type of digital data to n-bit digital data which an upper m-bit of the n-bit digital data is the m-bit second type of digital data and a remaining lower i-bit (i:whole number equivalent to n-m) of the n-bit digital data is a same level as a level of the m-bit second type of digital data.
Claim 9
Dependent Claim
50 words
A non-volatile multi-state memory device according to claim 7, wherein the m bit is 1 bit and the switching circuit includes a converting circuit for converting m-bit second type of digital data to n-bit digital data wherein all bits have the same level as m-bit second type of digital data.
Claim 10
Dependent Claim
71 words
A non-volatile multi-state memory device according to claim 6, wherein when a switch signal is at a second level, the switching circuit converts the m-bit second type of digital data to n-bit digital data of which an upper m-bit of the n-bit digital data is the m-bit second type of digital data and a remaining lower i-bit (i:whole number equivalent to n--m) of the n-bit digital data is a predetermined level.
Claim 11
Dependent Claim
40 words
A non-volatile multi-state memory device according to claim 9, wherein the switching circuit includes a gate circuit for fixing the lower i-bit of the n-bit digital data to a predetermined level when the switch signal is at a second level.
Claim 12
Dependent Claim
58 words
A non-volatile multi-state memory device according to claim 6, wherein said memory device further comprises a switch signal generating circuit for generating the switch signal which varies depending on whether data to be written are the first type of digital data or the second type of digital data and for supplying the switch signal to the switching circuit.
Claim 13
Dependent Claim
40 words
A non-volatile multi-state memory device according to claim 6, wherein the second type of digital data is address data for indicating a storing address of the first type of digital data to be stored in the non-volatile memory cell array.
Claim 14
Dependent Claim
47 words
A non-volatile multi-state memory device according to claim 6, said memory device further comprising a first data generating circuit for sequentially outputting first type of digital data in n-bit units; and a second data generating circuit for sequentially outputting second type of digital data in m-bit units.
Claim 15
Dependent Claim
58 words
A non-volatile multi-state memory device according to claim 13, wherein the second type of digital data is an address data for indicating a storing address of the first type of digital data to be stored in the non-volatile memory cell array; and the second data generating circuit is comprised from an address controller for outputting the address data.
Claim 16
Dependent Claim
30 words
A non-volatile multi-state memory device according to claim 14, wherein the address controller generates the switch signal which varies in accordance with the type of digital data to be written.
Claim 17
Dependent Claim
174 words
A non-volatile multi-state memory device according to claim 6, wherein the writing circuit includes a data register for holding the n-bit digital data output from the switching circuit; and when the switch signal to be input is at the first level, the switching circuit outputs the n-bit first type of digital data unaltered to the data register and when the switch signal is the second level, the switching circuit converts the m-bit second type of digital data to n-bit digital data of which at least an upper m-bit of the n-bit digital data is the m-bit second type of digital data and outputs this n-bit digital data to the data register; and wherein the memory device further comprises a gate circuit laid at an input side of the lower i-bit (i =whole number lower than n ) of the data register for outputting input data unaltered when the switch signal is at the first level and for fixing output digital data at a predetermined level when the switch signal is at the second level.
Claim 18
Dependent Claim
99 words
A non-volatile multi-state memory device according to claim 16, wherein the writing circuit comprises a voltage generating circuit for generating a plurality of analog voltages; a decoder for decoding data held in the data register and selectively outputting any one of the plurality of analog voltages in accordance with the content of data held in the data register; and a comparator for comparing a voltage corresponding to multi-level data read from the memory cell array with an output voltage of the decoder; and wherein writing of multi-level data is executed in response to a comparison result of the comparator.
Claim 19
Dependent Claim
126 words
A non-volatile multi-state memory device comprises: a non-volatile memory cell capable of storing multi-state data; and a writing circuit for writing multi-level data corresponding to an input n-bit digital data (n: whole number greater than 2) in the non-volatile memory cell, wherein said writing circuit includes: a data register for holding the n-bit digital data input thereto; and a gate circuit coupled to an input side of the lower i-bit(s) (i=whole number less than) of the n-bit data register, the gate circuit selectively fixing the lower i-bit(s) of digital data output from the data register, which is a portion of the n-bit digital data to be written in the non-volatile memory cell by the writing circuit, at a predetermined level in accordance with a switch signal.
Claim 20
Dependent Claim
126 words
A non-volatile multi-state memory device comprises: a non-volatile memory cell capable of storing multi-state data; and a writing circuit for writing multi-level data corresponding to an input n-bit digital data (n: whole number greater than 2) in the non-volatile memory cell, wherein said writing circuit includes: a data register for holding the n-bit digital data input thereto; and a gate circuit coupled to an input side of the lower i-bit(s) (i=whole number less than) of the n-bit data register, the gate circuit selectively fixing the lower i-bit(s) of digital data output from the data register, which is a portion of the n-bit digital data to be written in the non-volatile memory cell by the writing circuit, at a predetermined level in accordance with a switch signal.
Claim 21
Dependent Claim
43 words
A non-volatile multi-state memory device according to claim 18, wherein the gate circuit outputs unaltered input data when the switch signal is at a first level and fixes output data at a predetermined level when the switch signal is at a second level.
Claim 22
Dependent Claim
160 words
A non-volatile multi-state memory device capable of storing at least two digital data types as multi-state data in a non-volatile memory cell array, the two digital data types having different numbers of bits, said memory device comprising: a switching circuit for switching storing resolution in accordance with the digital data type being stored, wherein the switching circuit operates such that: one of the digital data types is stored at a first storing resolution by storing the digital data of that data type as multi-state data having a first number of bits, and another of the digital data types is stored at a second storing resolution by converting the digital data of that data type from digital data having a second number of bits, which is less than the first number of bits, to digital data having the first number of bits, and then storing the digital data of that data type as multi-state data having the first number of bits.
Claim 23
Dependent Claim
160 words
A non-volatile multi-state memory device capable of storing at least two digital data types as multi-state data in a non-volatile memory cell array, the two digital data types having different numbers of bits, said memory device comprising: a switching circuit for switching storing resolution in accordance with the digital data type being stored, wherein the switching circuit operates such that: one of the digital data types is stored at a first storing resolution by storing the digital data of that data type as multi-state data having a first number of bits, and another of the digital data types is stored at a second storing resolution by converting the digital data of that data type from digital data having a second number of bits, which is less than the first number of bits, to digital data having the first number of bits, and then storing the digital data of that data type as multi-state data having the first number of bits.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-06-15 | 2001-12-15 | 2002-06-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-06-15 | 2005-12-15 | 2006-06-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-06-15 | 2009-12-15 | 2010-06-16 | $7700.00 | Window Closed / Lapsed |