Non-volatile semiconductor memory of a metal ferroelectric field effect transistor

Claim 2

A non-volatile semiconductor memory comprising: a semiconductor substrate; a source region formed in the semiconductor substrate; a drain region formed in the semiconductor substrate; an insulating film formed on a surface of the semiconductor substrate between the source and drain regions; a first conductive thin film for use as a floating electrode formed on the insulating film; a ferroelectric thin film formed on the first conductive thin film, wherein a lattice constant of the ferroelectric thin film matches a lattice constant of the first conductive thin film; and a second conductive thin film for use as a control electrode formed on the ferroelectric thin film, wherein writing or erasing are performed by causing a potential difference between the control electrode and the semiconductor substrate to reverse a polarization of the ferroelectric thin film, wherein one memory cell is formed by only one transistor and wherein the second conductive thin film is connected to a word line, the source region is connected to a bit line, and the drain region is connected to a drive line.

Claim 3

A non-volatile semiconductor memory according to claim 1, wherein said first conductive thin film is made of platinum.

Claim 4

A non-volatile semiconductor memory according to claim 2, wherein said ferroelectric thin film is made of any of PbZr x Ti 1-x O 3 , PbTiO and Bi 4 Ti 3 O 12 .

Claim 5

A non-volatile semiconductor memory comprising: a semiconductor substrate; a source region formed in the semiconductor substrate; a drain region formed in the semiconductor substrate; an insulating film formed on a surface of the semiconductor substrate between the source and drain regions; a first conductive thin film for use as a floating electrode formed on the insulating film; a ferroelectric thin film formed on the first conductive thin film, wherein a lattice constant of said ferroelectric thin film matches a lattice constant of said floating electrode; a second conductive thin film for use as a control electrode formed on the ferroelectric thin film; means for applying a high bias voltage between the control electrode and the semiconductor substrate for writing information; and means for applying a low bias voltage between the control electrode and the semiconductor substrate for reading information, wherein one memory cell is formed by only one transistor and wherein the second conductive thin film is connected to a word line, the source region is connected to a bit line, and the drain region is connected to a drive line.

Claim 6

A non-volatile semiconductor memory comprising: a semiconductor substrate; a source region formed in the semiconductor substrate; a drain region formed in the semiconductor substrate; an insulating film formed on a surface of the semiconductor substrate between the source and drain regions; a first conductive thin film for use as a floating electrode formed on the insulating film; a ferroelectric thin film formed on the first conductive thin film, wherein a lattice constant of said ferroelectric thin film matches a lattice constant of said floating electrode; a second conductive thin film for use as a control electrode formed on the ferroelectric thin film; means for applying a high bias voltage between the control electrode and the semiconductor substrate for writing information; and means for applying a low bias voltage between the control electrode and the semiconductor substrate for reading information, wherein one memory cell is formed by only one transistor and wherein the second conductive thin film is connected to a word line, the source region is connected to a bit line, and the drain region is connected to a drive line.

Claim 7

A non-volatile semiconductor memory according to claim 1, wherein said high bias voltage is a voltage sufficient for a polarization of the ferroelectric thin film to be reversed and said low bias voltage is a voltage at which the polarization of the ferroelectric thin film is not reversed.

Claim 8

A non-volatile semiconductor memory comprising: a semiconductor substrate; a source region formed in the semiconductor substrate; a drain region formed in the semiconductor substrate; an insulating film formed on a surface of the semiconductor substrate between the source and drain regions; a first conductive thin film for use as a floating electrode formed on the insulating film; a ferroelectric thin film formed on the first conductive thin film, wherein said ferroelectric thin film has a lattice constant which matches a lattice constant of said floating gate electrode; and a second conductive thin film for use as a control electrode formed on the ferroelectric thin film, wherein the second conductive thin film is connected to a word line, the source region is connected to a bit line, and the drain region is connected to a drive line.

Claim 9

A non-volatile semiconductor memory comprising: a semiconductor substrate; a source region formed in the semiconductor substrate; a drain region formed in the semiconductor substrate; an insulating film formed on a surface of the semiconductor substrate between the source and drain regions; a first conductive thin film for use as a floating electrode formed on the insulating film; a ferroelectric thin film formed on the first conductive thin film, wherein said ferroelectric thin film has a lattice constant which matches a lattice constant of said floating gate electrode; and a second conductive thin film for use as a control electrode formed on the ferroelectric thin film, wherein the second conductive thin film is connected to a word line, the source region is connected to a bit line, and the drain region is connected to a drive line.

Claim 10

A non-volatile semiconductor memory according to claim 1, wherein said first conductive thin film has a two-layer structure including a first material having a lattice constant of said ferroelectric thin film and a second material having a contacting capability and a diffusion preventing capability.